{"id":"https://openalex.org/W2123135716","doi":"https://doi.org/10.1109/tc.2003.1244940","title":"Cmos vlsi implementation of a low-power logarithmic converter","display_name":"Cmos vlsi implementation of a low-power logarithmic converter","publication_year":2003,"publication_date":"2003-11-01","ids":{"openalex":"https://openalex.org/W2123135716","doi":"https://doi.org/10.1109/tc.2003.1244940","mag":"2123135716"},"language":"en","primary_location":{"id":"doi:10.1109/tc.2003.1244940","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2003.1244940","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5016582938","display_name":"Khalid H. Abed","orcid":"https://orcid.org/0000-0002-5203-2907"},"institutions":[{"id":"https://openalex.org/I19648265","display_name":"Wright State University","ror":"https://ror.org/04qk6pt94","country_code":"US","type":"education","lineage":["https://openalex.org/I19648265"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"K.H. Abed","raw_affiliation_strings":["Electrical Engineering Department, Wright State University, Dayton, OH, USA","Dept. of Electr. Eng., Wright State Univ., Dayton, OH, USA"],"affiliations":[{"raw_affiliation_string":"Electrical Engineering Department, Wright State University, Dayton, OH, USA","institution_ids":["https://openalex.org/I19648265"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Wright State Univ., Dayton, OH, USA","institution_ids":["https://openalex.org/I19648265"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5000997193","display_name":"R. Siferd","orcid":"https://orcid.org/0000-0001-6494-3575"},"institutions":[{"id":"https://openalex.org/I19648265","display_name":"Wright State University","ror":"https://ror.org/04qk6pt94","country_code":"US","type":"education","lineage":["https://openalex.org/I19648265"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"R.E. Siferd","raw_affiliation_strings":["Electrical Engineering Department, Wright State University, Dayton, OH, USA","Dept. of Electr. Eng., Wright State Univ., Dayton, OH, USA"],"affiliations":[{"raw_affiliation_string":"Electrical Engineering Department, Wright State University, Dayton, OH, USA","institution_ids":["https://openalex.org/I19648265"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Wright State Univ., Dayton, OH, USA","institution_ids":["https://openalex.org/I19648265"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5016582938"],"corresponding_institution_ids":["https://openalex.org/I19648265"],"apc_list":null,"apc_paid":null,"fwci":4.1729,"has_fulltext":false,"cited_by_count":169,"citation_normalized_percentile":{"value":0.94183406,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":100},"biblio":{"volume":"52","issue":"11","first_page":"1421","last_page":"1433"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6907232999801636},{"id":"https://openalex.org/keywords/logarithm","display_name":"Logarithm","score":0.5967576503753662},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5387187600135803},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5113434195518494},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.47438815236091614},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.46318861842155457},{"id":"https://openalex.org/keywords/binary-search-algorithm","display_name":"Binary search algorithm","score":0.421543687582016},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3272329270839691},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.3251398205757141},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.32287073135375977},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.2520439028739929},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2055208384990692}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6907232999801636},{"id":"https://openalex.org/C39927690","wikidata":"https://www.wikidata.org/wiki/Q11197","display_name":"Logarithm","level":2,"score":0.5967576503753662},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5387187600135803},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5113434195518494},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.47438815236091614},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.46318861842155457},{"id":"https://openalex.org/C121610932","wikidata":"https://www.wikidata.org/wiki/Q243754","display_name":"Binary search algorithm","level":3,"score":0.421543687582016},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3272329270839691},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.3251398205757141},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.32287073135375977},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.2520439028739929},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2055208384990692},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C125583679","wikidata":"https://www.wikidata.org/wiki/Q755673","display_name":"Search algorithm","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tc.2003.1244940","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2003.1244940","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.7400000095367432}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W1977680859","https://openalex.org/W1986198459","https://openalex.org/W1986396242","https://openalex.org/W1994249587","https://openalex.org/W2001196582","https://openalex.org/W2023641114","https://openalex.org/W2040583301","https://openalex.org/W2107624728","https://openalex.org/W2111013824","https://openalex.org/W2112527844","https://openalex.org/W2113090551","https://openalex.org/W2121844931","https://openalex.org/W2130956968","https://openalex.org/W2131215121","https://openalex.org/W2143385993","https://openalex.org/W2147479230","https://openalex.org/W2148387747","https://openalex.org/W2149397818","https://openalex.org/W2154355867","https://openalex.org/W2157024459","https://openalex.org/W2165277449","https://openalex.org/W2171240804","https://openalex.org/W2171451363","https://openalex.org/W2186951111","https://openalex.org/W2272501676","https://openalex.org/W3103339143","https://openalex.org/W4232621341","https://openalex.org/W4236574417"],"related_works":["https://openalex.org/W2382626982","https://openalex.org/W2376716665","https://openalex.org/W1495725930","https://openalex.org/W1525838894","https://openalex.org/W2110562615","https://openalex.org/W4295363057","https://openalex.org/W1988575180","https://openalex.org/W2352621013","https://openalex.org/W1522863580","https://openalex.org/W2141208293"],"abstract_inverted_index":{"We":[0],"present":[1],"a":[2,24,28,124],"unique":[3,39],"32-bit":[4,74,127,132,161],"binary-to-binary":[5,59],"logarithm":[6,25,35,60],"converter":[7,14,108,136,178],"including":[8],"its":[9],"CMOS":[10,142,157],"VLSI":[11],"implementation.":[12],"The":[13,135],"is":[15,95,137],"implemented":[16,44,138],"using":[17,139],"combinational":[18],"logic":[19],"only":[20],"and":[21,43,47,67,73,110,144,176],"it":[22,145],"calculates":[23],"approximation":[26],"in":[27,115,120,130],"single":[29],"clock":[30],"cycle.":[31],"Unlike":[32],"other":[33],"complex":[34],"correcting":[36],"algorithms,":[37],"three":[38],"algorithms":[40],"are":[41,78],"developed":[42],"with":[45],"low-power":[46],"fast":[48],"circuits":[49,77],"that":[50,56],"reduce":[51],"the":[52,82,103,116,121,131,156,160,177],"maximum":[53],"percent":[54],"errors":[55],"result":[57],"from":[58],"conversion":[61],"to":[62,80,97,169],"0.9299":[63],"percent,":[64,66],"0.4314":[65],"0.1538":[68],"percent.":[69],"Fast":[70],"4,":[71],"16,":[72],"leading-one":[75,83,105],"detector":[76],"designed":[79],"obtain":[81],"position":[84],"of":[85,123,151,155],"an":[86],"input":[87],"binary":[88],"word.":[89],"A":[90],"32-word/spl":[91],"times/5-bit":[92],"MOS":[93],"ROM":[94],"used":[96],"provide":[98],"5-bit":[99],"integers":[100],"based":[101],"on":[102],"corresponding":[104],"position.":[106],"Both":[107],"area":[109],"speed":[111],"have":[112],"been":[113],"considered":[114],"design":[117,158],"approach,":[118],"resulting":[119],"use":[122],"very":[125],"efficient":[126],"logarithmic":[128,133,162],"shifter":[129],"converter.":[134],"0.6/spl":[140],"mu/m":[141],"technology,":[143],"requires":[146],"1,600/spl":[147],"lambda//spl":[148],"times/2,800/spl":[149],"lambda/":[150],"chip":[152],"area.":[153],"Simulations":[154],"for":[159],"converter,":[163],"operating":[164],"at":[165,173],"V/sub":[166],"DD/":[167],"equal":[168],"5":[170],"volts,":[171],"run":[172],"55":[174],"MHz,":[175],"consumes":[179],"20":[180],"milliwatts.":[181]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":11},{"year":2020,"cited_by_count":11},{"year":2019,"cited_by_count":9},{"year":2018,"cited_by_count":13},{"year":2017,"cited_by_count":9},{"year":2016,"cited_by_count":8},{"year":2015,"cited_by_count":9},{"year":2014,"cited_by_count":12},{"year":2013,"cited_by_count":12},{"year":2012,"cited_by_count":8}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}