{"id":"https://openalex.org/W2114591121","doi":"https://doi.org/10.1109/tc.2003.1234523","title":"A dynamically tunable memory hierarchy","display_name":"A dynamically tunable memory hierarchy","publication_year":2003,"publication_date":"2003-10-01","ids":{"openalex":"https://openalex.org/W2114591121","doi":"https://doi.org/10.1109/tc.2003.1234523","mag":"2114591121"},"language":"en","primary_location":{"id":"doi:10.1109/tc.2003.1234523","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2003.1234523","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5087056095","display_name":"Rajeev Balasubramonian","orcid":"https://orcid.org/0009-0009-4093-5904"},"institutions":[{"id":"https://openalex.org/I5388228","display_name":"University of Rochester","ror":"https://ror.org/022kthw22","country_code":"US","type":"education","lineage":["https://openalex.org/I5388228"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"R. Balasubramonian","raw_affiliation_strings":["Department of Computer Science and Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA","Dept. of Comput. Sci. & Electr. & Comput. Eng., Rochester Univ., NY, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA","institution_ids":["https://openalex.org/I5388228"]},{"raw_affiliation_string":"Dept. of Comput. Sci. & Electr. & Comput. Eng., Rochester Univ., NY, USA","institution_ids":["https://openalex.org/I5388228"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009386140","display_name":"David H. Albonesi","orcid":null},"institutions":[{"id":"https://openalex.org/I5388228","display_name":"University of Rochester","ror":"https://ror.org/022kthw22","country_code":"US","type":"education","lineage":["https://openalex.org/I5388228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D.H. Albonesi","raw_affiliation_strings":["Department of Computer Science and Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA","Dept. of Comput. Sci. & Electr. & Comput. Eng., Rochester Univ., NY, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA","institution_ids":["https://openalex.org/I5388228"]},{"raw_affiliation_string":"Dept. of Comput. Sci. & Electr. & Comput. Eng., Rochester Univ., NY, USA","institution_ids":["https://openalex.org/I5388228"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044824009","display_name":"Alper Buyuktosunoglu","orcid":"https://orcid.org/0000-0002-5341-8916"},"institutions":[{"id":"https://openalex.org/I5388228","display_name":"University of Rochester","ror":"https://ror.org/022kthw22","country_code":"US","type":"education","lineage":["https://openalex.org/I5388228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Buyuktosunoglu","raw_affiliation_strings":["Department of Computer Science and Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA","Dept. of Comput. Sci. & Electr. & Comput. Eng., Rochester Univ., NY, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA","institution_ids":["https://openalex.org/I5388228"]},{"raw_affiliation_string":"Dept. of Comput. Sci. & Electr. & Comput. Eng., Rochester Univ., NY, USA","institution_ids":["https://openalex.org/I5388228"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5013232946","display_name":"Sandhya Dwarkadas","orcid":"https://orcid.org/0000-0003-2631-8191"},"institutions":[{"id":"https://openalex.org/I5388228","display_name":"University of Rochester","ror":"https://ror.org/022kthw22","country_code":"US","type":"education","lineage":["https://openalex.org/I5388228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Dwarkadas","raw_affiliation_strings":["Department of Computer Science and Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA","Dept. of Comput. Sci. & Electr. & Comput. Eng., Rochester Univ., NY, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA","institution_ids":["https://openalex.org/I5388228"]},{"raw_affiliation_string":"Dept. of Comput. Sci. & Electr. & Comput. Eng., Rochester Univ., NY, USA","institution_ids":["https://openalex.org/I5388228"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5087056095"],"corresponding_institution_ids":["https://openalex.org/I5388228"],"apc_list":null,"apc_paid":null,"fwci":1.7314,"has_fulltext":false,"cited_by_count":42,"citation_normalized_percentile":{"value":0.85106582,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":99},"biblio":{"volume":"52","issue":"10","first_page":"1243","last_page":"1258"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/translation-lookaside-buffer","display_name":"Translation lookaside buffer","score":0.9147127270698547},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8182936906814575},{"id":"https://openalex.org/keywords/memory-hierarchy","display_name":"Memory hierarchy","score":0.7277768850326538},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.6280808448791504},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.5653024911880493},{"id":"https://openalex.org/keywords/hierarchy","display_name":"Hierarchy","score":0.5206558108329773},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4934948682785034},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.4371912479400635},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.42975538969039917},{"id":"https://openalex.org/keywords/power\u2013delay-product","display_name":"Power\u2013delay product","score":0.4107782244682312},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.38980963826179504},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.38471686840057373},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.1554517149925232},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.14226678013801575},{"id":"https://openalex.org/keywords/physical-address","display_name":"Physical address","score":0.14120391011238098},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09982931613922119},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.08583495020866394}],"concepts":[{"id":"https://openalex.org/C116007543","wikidata":"https://www.wikidata.org/wiki/Q1071403","display_name":"Translation lookaside buffer","level":4,"score":0.9147127270698547},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8182936906814575},{"id":"https://openalex.org/C2778100165","wikidata":"https://www.wikidata.org/wiki/Q1589327","display_name":"Memory hierarchy","level":3,"score":0.7277768850326538},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.6280808448791504},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.5653024911880493},{"id":"https://openalex.org/C31170391","wikidata":"https://www.wikidata.org/wiki/Q188619","display_name":"Hierarchy","level":2,"score":0.5206558108329773},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4934948682785034},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.4371912479400635},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.42975538969039917},{"id":"https://openalex.org/C2776391166","wikidata":"https://www.wikidata.org/wiki/Q7236873","display_name":"Power\u2013delay product","level":4,"score":0.4107782244682312},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.38980963826179504},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38471686840057373},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.1554517149925232},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.14226678013801575},{"id":"https://openalex.org/C41036726","wikidata":"https://www.wikidata.org/wiki/Q844824","display_name":"Physical address","level":3,"score":0.14120391011238098},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09982931613922119},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.08583495020866394},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C34447519","wikidata":"https://www.wikidata.org/wiki/Q179522","display_name":"Market economy","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tc.2003.1234523","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2003.1234523","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.420.7306","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.420.7306","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cs.utah.edu/~rajeev/pubs/toc03.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.9100000262260437,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":43,"referenced_works":["https://openalex.org/W145461779","https://openalex.org/W1544623790","https://openalex.org/W1556752523","https://openalex.org/W1975745331","https://openalex.org/W2032094184","https://openalex.org/W2037827849","https://openalex.org/W2080958936","https://openalex.org/W2099958604","https://openalex.org/W2101308451","https://openalex.org/W2102081731","https://openalex.org/W2102850792","https://openalex.org/W2110296438","https://openalex.org/W2112505501","https://openalex.org/W2112833506","https://openalex.org/W2119874774","https://openalex.org/W2127609451","https://openalex.org/W2138351227","https://openalex.org/W2142033140","https://openalex.org/W2143285027","https://openalex.org/W2146307698","https://openalex.org/W2146844574","https://openalex.org/W2151817873","https://openalex.org/W2154554979","https://openalex.org/W2154702295","https://openalex.org/W2158967724","https://openalex.org/W2161991038","https://openalex.org/W2164490311","https://openalex.org/W2167195409","https://openalex.org/W2169928889","https://openalex.org/W2173229352","https://openalex.org/W2174102096","https://openalex.org/W2179730127","https://openalex.org/W4236258190","https://openalex.org/W4236318606","https://openalex.org/W4237150160","https://openalex.org/W4242081832","https://openalex.org/W4242420966","https://openalex.org/W4242630332","https://openalex.org/W4244464045","https://openalex.org/W4300070394","https://openalex.org/W6605915676","https://openalex.org/W6633226485","https://openalex.org/W6683582875"],"related_works":["https://openalex.org/W189970040","https://openalex.org/W3196094483","https://openalex.org/W192356505","https://openalex.org/W2350803493","https://openalex.org/W1586753310","https://openalex.org/W4230093848","https://openalex.org/W2654056874","https://openalex.org/W2027615723","https://openalex.org/W4251014361","https://openalex.org/W2028246064"],"abstract_inverted_index":{"The":[0,89],"widespread":[1],"use":[2],"of":[3,11,85,127,134],"repeaters":[4],"in":[5,112],"long":[6],"wires":[7],"creates":[8],"the":[9,69,72,83,102,116,122,132],"possibility":[10],"dynamically":[12,33,73,92],"sizing":[13],"regular":[14],"on-chip":[15],"structures.":[16],"We":[17,120],"present":[18],"a":[19,43,48,56,63,98],"tunable":[20,74],"cache":[21,75],"and":[22,39,76,96,109,124,130],"translation":[23],"lookaside":[24],"buffer":[25],"(TLB)":[26],"hierarchy":[27,78],"that":[28,59],"leverages":[29],"repeater":[30],"insertion":[31],"to":[32,55,68,82,105,114],"trade":[34],"off":[35],"size":[36],"for":[37],"speed":[38],"power":[40],"consumption":[41,126],"on":[42,101,138],"per-application":[44],"phase":[45,94],"basis":[46],"using":[47],"novel":[49],"configuration":[50,90,99],"management":[51],"algorithm.":[52],"In":[53],"comparison":[54],"conventional":[57],"design":[58,65],"is":[60],"fixed":[61],"at":[62],"single":[64],"point":[66],"targeted":[67],"average":[70],"application,":[71],"TLB":[77],"can":[79],"be":[80],"tailored":[81],"needs":[84],"each":[86],"application":[87],"phase.":[88],"algorithm":[91],"detects":[93],"changes":[95],"selects":[97],"based":[100],"application's":[103],"ability":[104],"tolerate":[106],"different":[107],"hit":[108],"miss":[110],"latencies":[111],"order":[113],"improve":[115],"memory":[117],"energy-delay":[118],"product.":[119],"evaluate":[121],"performance":[123],"energy":[125],"our":[128,139],"approach":[129],"project":[131],"effects":[133],"technology":[135],"scaling":[136],"trends":[137],"design.":[140]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":2}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}