{"id":"https://openalex.org/W2153458792","doi":"https://doi.org/10.1109/tc.2003.1190589","title":"A highly regular and scalable aes hardware architecture","display_name":"A highly regular and scalable aes hardware architecture","publication_year":2003,"publication_date":"2003-04-01","ids":{"openalex":"https://openalex.org/W2153458792","doi":"https://doi.org/10.1109/tc.2003.1190589","mag":"2153458792"},"language":"en","primary_location":{"id":"doi:10.1109/tc.2003.1190589","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2003.1190589","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5015437576","display_name":"Stefan Mangard","orcid":"https://orcid.org/0000-0001-9650-8041"},"institutions":[{"id":"https://openalex.org/I4092182","display_name":"Graz University of Technology","ror":"https://ror.org/00d7xrm67","country_code":"AT","type":"education","lineage":["https://openalex.org/I4092182"]}],"countries":["AT"],"is_corresponding":true,"raw_author_name":"S. Mangard","raw_affiliation_strings":["Institute for Applied Information Processing and Communications (IAIK), Graz University of Technology, Graz, Austria"],"affiliations":[{"raw_affiliation_string":"Institute for Applied Information Processing and Communications (IAIK), Graz University of Technology, Graz, Austria","institution_ids":["https://openalex.org/I4092182"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054583230","display_name":"Manfred Aigner","orcid":"https://orcid.org/0000-0001-8723-4966"},"institutions":[{"id":"https://openalex.org/I4092182","display_name":"Graz University of Technology","ror":"https://ror.org/00d7xrm67","country_code":"AT","type":"education","lineage":["https://openalex.org/I4092182"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"M. Aigner","raw_affiliation_strings":["Institute for Applied Information Processing and Communications (IAIK), Graz University of Technology, Graz, Austria"],"affiliations":[{"raw_affiliation_string":"Institute for Applied Information Processing and Communications (IAIK), Graz University of Technology, Graz, Austria","institution_ids":["https://openalex.org/I4092182"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5067728386","display_name":"Sandra Dominikus","orcid":null},"institutions":[{"id":"https://openalex.org/I4092182","display_name":"Graz University of Technology","ror":"https://ror.org/00d7xrm67","country_code":"AT","type":"education","lineage":["https://openalex.org/I4092182"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"S. Dominikus","raw_affiliation_strings":["Institute for Applied Information Processing and Communications (IAIK), Graz University of Technology, Graz, Austria"],"affiliations":[{"raw_affiliation_string":"Institute for Applied Information Processing and Communications (IAIK), Graz University of Technology, Graz, Austria","institution_ids":["https://openalex.org/I4092182"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5015437576"],"corresponding_institution_ids":["https://openalex.org/I4092182"],"apc_list":null,"apc_paid":null,"fwci":26.6739,"has_fulltext":false,"cited_by_count":205,"citation_normalized_percentile":{"value":0.9966124,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"52","issue":"4","first_page":"483","last_page":"491"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11017","display_name":"Chaos-based Image/Signal Encryption","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11130","display_name":"Coding theory and cryptography","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.8136523365974426},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7818607091903687},{"id":"https://openalex.org/keywords/advanced-encryption-standard","display_name":"Advanced Encryption Standard","score":0.763990044593811},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.6956660747528076},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.6179213523864746},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5616039037704468},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.5323835611343384},{"id":"https://openalex.org/keywords/encryption","display_name":"Encryption","score":0.518511176109314},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.49505892395973206},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.47975456714630127},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.4421389400959015},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.4401059150695801},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.4212656021118164},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4200728237628937},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.38028955459594727},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.18433907628059387},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.12715011835098267},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.0960184633731842}],"concepts":[{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.8136523365974426},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7818607091903687},{"id":"https://openalex.org/C94520183","wikidata":"https://www.wikidata.org/wiki/Q190746","display_name":"Advanced Encryption Standard","level":3,"score":0.763990044593811},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.6956660747528076},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.6179213523864746},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5616039037704468},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.5323835611343384},{"id":"https://openalex.org/C148730421","wikidata":"https://www.wikidata.org/wiki/Q141090","display_name":"Encryption","level":2,"score":0.518511176109314},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.49505892395973206},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.47975456714630127},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.4421389400959015},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.4401059150695801},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.4212656021118164},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4200728237628937},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.38028955459594727},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.18433907628059387},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.12715011835098267},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0960184633731842},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tc.2003.1190589","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2003.1190589","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.629.6206","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.629.6206","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://class.ece.iastate.edu/tyagi/cpre681/papers/AESHWTC2003.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.41999998688697815,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W40954287","https://openalex.org/W74404479","https://openalex.org/W170872169","https://openalex.org/W1487268209","https://openalex.org/W1572300106","https://openalex.org/W1602420333","https://openalex.org/W2099179520","https://openalex.org/W2102550826","https://openalex.org/W2112244944","https://openalex.org/W2117013296","https://openalex.org/W2127752881","https://openalex.org/W2135430020","https://openalex.org/W2145881907","https://openalex.org/W2154909745","https://openalex.org/W2885816077","https://openalex.org/W3153311510","https://openalex.org/W4285719527","https://openalex.org/W6601657671","https://openalex.org/W6603015574","https://openalex.org/W6606932528","https://openalex.org/W6635937959","https://openalex.org/W6674717686","https://openalex.org/W6753247781","https://openalex.org/W6794054644"],"related_works":["https://openalex.org/W2889102485","https://openalex.org/W2388299947","https://openalex.org/W4312846945","https://openalex.org/W2134697552","https://openalex.org/W4385831984","https://openalex.org/W3047211184","https://openalex.org/W2158494242","https://openalex.org/W2169589717","https://openalex.org/W4243638536","https://openalex.org/W1485408346"],"abstract_inverted_index":{"This":[0,76],"article":[1],"presents":[2],"a":[3,25,58,65,98,110,116],"highly":[4],"regular":[5],"and":[6,39,52],"scalable":[7,34],"AES":[8,91],"hardware":[9,92],"architecture,":[10],"suited":[11],"for":[12,17,72],"full-custom":[13],"as":[14,16],"well":[15],"semicustom":[18],"design":[19],"flows.":[20],"Contrary":[21],"to":[22,56],"other":[23,89],"publications,":[24],"complete":[26],"architecture":[27,93,108],"(even":[28],"including":[29],"CBC":[30],"mode)":[31],"that":[32],"is":[33,47,78],"in":[35,40],"terms":[36,41],"of":[37,42,50,61,85,102,106,112],"throughput":[38,111],"the":[43,73,82,86,103,107],"used":[44],"key":[45],"size":[46],"described.":[48],"Similarities":[49],"encryption":[51],"decryption":[53],"are":[54],"utilized":[55],"provide":[57,109],"high":[59],"level":[60],"performance":[62,77],"using":[63,122],"only":[64],"relatively":[66],"small":[67],"area":[68],"(10,799":[69],"gate":[70],"equivalents":[71],"standard":[74,123],"configuration).":[75],"reached":[79],"by":[80],"balancing":[81,96],"combinational":[83],"paths":[84],"design.":[87],"No":[88],"published":[90],"provides":[94],"similar":[95],"or":[97],"comparable":[99],"regularity.":[100],"Implementations":[101],"fastest":[104],"configuration":[105],"241":[113],"Mbits/sec":[114],"on":[115],"0.6":[117],"/spl":[118],"mu/m":[119],"CMOS":[120],"process":[121],"cells.":[124]},"counts_by_year":[{"year":2025,"cited_by_count":6},{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":8},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":7},{"year":2016,"cited_by_count":7},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":9},{"year":2013,"cited_by_count":8},{"year":2012,"cited_by_count":7}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}