{"id":"https://openalex.org/W1984277858","doi":"https://doi.org/10.1109/tc.1986.1676841","title":"An Instruction Issuing Approach to Enhancing Performance in Multiple Functional Unit Processors","display_name":"An Instruction Issuing Approach to Enhancing Performance in Multiple Functional Unit Processors","publication_year":1986,"publication_date":"1986-09-01","ids":{"openalex":"https://openalex.org/W1984277858","doi":"https://doi.org/10.1109/tc.1986.1676841","mag":"1984277858"},"language":"en","primary_location":{"id":"doi:10.1109/tc.1986.1676841","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1986.1676841","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069971844","display_name":"Acosta","orcid":null},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Acosta","raw_affiliation_strings":["Microelectronics and Computer Technology Corporation","Microelectronics and Computer Technology Corporation, Austin, TX, USA","School of Electrical Engineering, Cornell University, Ithaca, NY, USA"],"affiliations":[{"raw_affiliation_string":"Microelectronics and Computer Technology Corporation","institution_ids":[]},{"raw_affiliation_string":"Microelectronics and Computer Technology Corporation, Austin, TX, USA","institution_ids":[]},{"raw_affiliation_string":"School of Electrical Engineering, Cornell University, Ithaca, NY, USA","institution_ids":["https://openalex.org/I205783295"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5097905843","display_name":"Kjelstrup","orcid":null},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]},{"id":"https://openalex.org/I4210107053","display_name":"Core Competence","ror":"https://ror.org/012cc0c94","country_code":"US","type":"company","lineage":["https://openalex.org/I4210107053"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kjelstrup","raw_affiliation_strings":["Bell Communications Research, Inc., West Long Branch, NJ, USA","School of Electrical Engineering, Cornell University, Ithaca, NY, USA"],"affiliations":[{"raw_affiliation_string":"Bell Communications Research, Inc., West Long Branch, NJ, USA","institution_ids":["https://openalex.org/I4210107053"]},{"raw_affiliation_string":"School of Electrical Engineering, Cornell University, Ithaca, NY, USA","institution_ids":["https://openalex.org/I205783295"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5045451158","display_name":"Torng","orcid":null},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Torng","raw_affiliation_strings":["School of Electrical Engineering, Cornell University, Ithaca, NY, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering, Cornell University, Ithaca, NY, USA","institution_ids":["https://openalex.org/I205783295"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5069971844"],"corresponding_institution_ids":["https://openalex.org/I205783295"],"apc_list":null,"apc_paid":null,"fwci":9.9246,"has_fulltext":false,"cited_by_count":101,"citation_normalized_percentile":{"value":0.97963676,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"C-35","issue":"9","first_page":"815","last_page":"828"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8774609565734863},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5928682684898376},{"id":"https://openalex.org/keywords/identification","display_name":"Identification (biology)","score":0.5485832691192627},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.5361202955245972},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4530394673347473},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.44968268275260925},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4357690215110779},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2246009111404419},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.13334587216377258}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8774609565734863},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5928682684898376},{"id":"https://openalex.org/C116834253","wikidata":"https://www.wikidata.org/wiki/Q2039217","display_name":"Identification (biology)","level":2,"score":0.5485832691192627},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.5361202955245972},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4530394673347473},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.44968268275260925},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4357690215110779},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2246009111404419},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.13334587216377258},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C59822182","wikidata":"https://www.wikidata.org/wiki/Q441","display_name":"Botany","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tc.1986.1676841","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1986.1676841","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.5}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":30,"referenced_works":["https://openalex.org/W2440755","https://openalex.org/W32988846","https://openalex.org/W1513250879","https://openalex.org/W1522888794","https://openalex.org/W1600663980","https://openalex.org/W1811377747","https://openalex.org/W1987674899","https://openalex.org/W1991509743","https://openalex.org/W2014025946","https://openalex.org/W2031337049","https://openalex.org/W2033925885","https://openalex.org/W2042617557","https://openalex.org/W2069952017","https://openalex.org/W2072480015","https://openalex.org/W2074175208","https://openalex.org/W2075523020","https://openalex.org/W2084444083","https://openalex.org/W2098452744","https://openalex.org/W2114876342","https://openalex.org/W2130566259","https://openalex.org/W2144481293","https://openalex.org/W2170585292","https://openalex.org/W2241063590","https://openalex.org/W2295576379","https://openalex.org/W2295787458","https://openalex.org/W2340812064","https://openalex.org/W4232433569","https://openalex.org/W4235077482","https://openalex.org/W4249596969","https://openalex.org/W6697432976"],"related_works":["https://openalex.org/W2136583354","https://openalex.org/W2111238207","https://openalex.org/W2046435967","https://openalex.org/W1975289146","https://openalex.org/W4231775656","https://openalex.org/W2760721665","https://openalex.org/W2087240539","https://openalex.org/W2105887828","https://openalex.org/W2122599759","https://openalex.org/W2352941988"],"abstract_inverted_index":{"Processors":[0],"with":[1,72],"multiple":[2],"functional":[3,64],"units,":[4],"such":[5,31],"as":[6],"CRAY-1,":[7],"Cyber":[8],"205,":[9],"and":[10,42,66],"FPS":[11],"164,":[12],"have":[13],"been":[14,24],"used":[15],"for":[16],"high-end":[17],"scientific":[18],"computation":[19],"tasks.":[20],"Much":[21],"effort":[22],"has":[23],"put":[25],"into":[26],"increasing":[27],"the":[28,40,63,68],"throughput":[29],"of":[30,44],"systems.":[32],"One":[33],"critical":[34],"consideration":[35],"in":[36],"their":[37],"design":[38],"is":[39],"identification":[41],"implementation":[43],"a":[45],"suitable":[46],"instruction":[47],"issuing":[48],"scheme.":[49],"Existing":[50],"approaches":[51],"do":[52],"not":[53],"issue":[54],"enough":[55],"instructions":[56],"per":[57],"machine":[58],"cycle":[59],"to":[60],"fully":[61],"utilize":[62],"units":[65],"realize":[67],"high-performance":[69],"level":[70],"achievable":[71],"these":[73],"powerful":[74],"execution":[75],"resources.":[76]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
