{"id":"https://openalex.org/W1813466981","doi":"https://doi.org/10.1109/tc.1986.1676785","title":"A Study of Pipelining in Computing Arrays","display_name":"A Study of Pipelining in Computing Arrays","publication_year":1986,"publication_date":"1986-05-01","ids":{"openalex":"https://openalex.org/W1813466981","doi":"https://doi.org/10.1109/tc.1986.1676785","mag":"1813466981"},"language":"en","primary_location":{"id":"doi:10.1109/tc.1986.1676785","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1986.1676785","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5098628756","display_name":"Jagadish","orcid":null},"institutions":[{"id":"https://openalex.org/I1283103587","display_name":"AT&T (United States)","ror":"https://ror.org/02bbd5539","country_code":"US","type":"company","lineage":["https://openalex.org/I1283103587"]},{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Jagadish","raw_affiliation_strings":["AT&amp;T Bell Laboratories","AT and T Bell Laboratories, Inc., Murray Hill, NJ, USA","Information Systems Laboratory, Department of Electrical Engineering, University of Stanford, Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"AT&amp;T Bell Laboratories","institution_ids":["https://openalex.org/I1283103587"]},{"raw_affiliation_string":"AT and T Bell Laboratories, Inc., Murray Hill, NJ, USA","institution_ids":["https://openalex.org/I1283103587"]},{"raw_affiliation_string":"Information Systems Laboratory, Department of Electrical Engineering, University of Stanford, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109496323","display_name":"Mathews","orcid":null},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mathews","raw_affiliation_strings":["Information Systems Laboratory, Department of Electrical Engineering, University of Stanford, Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"Information Systems Laboratory, Department of Electrical Engineering, University of Stanford, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023503176","display_name":"Kailath","orcid":null},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kailath","raw_affiliation_strings":["Information Systems Laboratory Department of Electrical Engineering, University of Stanford, Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"Information Systems Laboratory Department of Electrical Engineering, University of Stanford, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5098540487","display_name":"Newkirk","orcid":null},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Newkirk","raw_affiliation_strings":["Information Systems Laboratory Department of Electrical Engineering, University of Stanford, Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"Information Systems Laboratory Department of Electrical Engineering, University of Stanford, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5098628756"],"corresponding_institution_ids":["https://openalex.org/I1283103587","https://openalex.org/I97018004"],"apc_list":null,"apc_paid":null,"fwci":12.4848,"has_fulltext":false,"cited_by_count":26,"citation_normalized_percentile":{"value":0.9889043,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"C-35","issue":"5","first_page":"431","last_page":"440"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12784","display_name":"Modular Robots and Swarm Intelligence","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/2210","display_name":"Mechanical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12784","display_name":"Modular Robots and Swarm Intelligence","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/2210","display_name":"Mechanical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9943000078201294,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12162","display_name":"Cellular Automata and Applications","score":0.9940999746322632,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8167115449905396},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7024478912353516},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.6217941045761108},{"id":"https://openalex.org/keywords/simple","display_name":"Simple (philosophy)","score":0.53788822889328},{"id":"https://openalex.org/keywords/processor-scheduling","display_name":"Processor scheduling","score":0.5191044807434082},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.47788822650909424},{"id":"https://openalex.org/keywords/software-pipelining","display_name":"Software pipelining","score":0.4289494752883911},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3953717052936554},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3541778326034546},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.13086357712745667},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.12747102975845337},{"id":"https://openalex.org/keywords/schedule","display_name":"Schedule","score":0.11086863279342651},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.10144606232643127}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8167115449905396},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7024478912353516},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.6217941045761108},{"id":"https://openalex.org/C2780586882","wikidata":"https://www.wikidata.org/wiki/Q7520643","display_name":"Simple (philosophy)","level":2,"score":0.53788822889328},{"id":"https://openalex.org/C2984822820","wikidata":"https://www.wikidata.org/wiki/Q1123036","display_name":"Processor scheduling","level":3,"score":0.5191044807434082},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.47788822650909424},{"id":"https://openalex.org/C188854837","wikidata":"https://www.wikidata.org/wiki/Q268469","display_name":"Software pipelining","level":3,"score":0.4289494752883911},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3953717052936554},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3541778326034546},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.13086357712745667},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.12747102975845337},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.11086863279342651},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.10144606232643127},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tc.1986.1676785","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1986.1676785","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W12081373","https://openalex.org/W963401927","https://openalex.org/W1509443229","https://openalex.org/W1581053260","https://openalex.org/W1793088242","https://openalex.org/W1982465265","https://openalex.org/W2017369466","https://openalex.org/W2022980325","https://openalex.org/W2071696716","https://openalex.org/W2085887317","https://openalex.org/W2091104536","https://openalex.org/W2138245082","https://openalex.org/W2144799791","https://openalex.org/W2148631003","https://openalex.org/W6630562399"],"related_works":["https://openalex.org/W2131288498","https://openalex.org/W1603958403","https://openalex.org/W1976397984","https://openalex.org/W2034393996","https://openalex.org/W1567574506","https://openalex.org/W2118368532","https://openalex.org/W2128410848","https://openalex.org/W2101285930","https://openalex.org/W2038654640","https://openalex.org/W2571417379"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"we":[3],"take":[4,58],"a":[5,23,59,83],"hard":[6],"look":[7],"at":[8],"scheduling":[9],"considerations":[10],"in":[11,35,45],"computing":[12,24],"arrays.":[13],"A":[14],"simple":[15],"sufficient":[16],"condition":[17,40],"is":[18],"developed":[19],"for":[20],"determining":[21],"whether":[22],"array":[25,31],"can":[26],"be":[27,33],"pipelined.":[28],"If":[29],"the":[30,36,39,43,63,66,70,74,77,80],"cannot":[32],"pipelined":[34],"form":[37],"given,":[38],"also":[41],"indicates":[42],"direction":[44],"which":[46],"to":[47,49,79],"proceed":[48],"make":[50,73],"it":[51],"pipelineable.":[52],"The":[53],"overall":[54],"framework":[55],"and":[56,72],"methodology":[57],"good":[60],"part":[61],"of":[62,69],"load":[64],"off":[65],"logical":[67,78],"architect":[68],"array,":[71],"translation":[75],"from":[76],"physical":[81],"architecture":[82],"mechanical":[84],"process.":[85]},"counts_by_year":[{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
