{"id":"https://openalex.org/W2062505844","doi":"https://doi.org/10.1109/tc.1986.1676680","title":"A Signed Bit-Sequential Multiplier","display_name":"A Signed Bit-Sequential Multiplier","publication_year":1986,"publication_date":"1986-10-01","ids":{"openalex":"https://openalex.org/W2062505844","doi":"https://doi.org/10.1109/tc.1986.1676680","mag":"2062505844"},"language":"en","primary_location":{"id":"doi:10.1109/tc.1986.1676680","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1986.1676680","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5017559488","display_name":"Rhyne","orcid":null},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]},{"id":"https://openalex.org/I2802043390","display_name":"McLennan Community College","ror":"https://ror.org/05nf32076","country_code":"US","type":"education","lineage":["https://openalex.org/I157394403","https://openalex.org/I2802043390","https://openalex.org/I4210129632"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Rhyne","raw_affiliation_strings":["MCC","Department of Electrical Engineering, Texas A and M University, College Station, TX, USA","MCC, Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"MCC","institution_ids":[]},{"raw_affiliation_string":"Department of Electrical Engineering, Texas A and M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"MCC, Austin, TX, USA","institution_ids":["https://openalex.org/I2802043390"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009857260","display_name":"Strader","orcid":null},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]},{"id":"https://openalex.org/I2802043390","display_name":"McLennan Community College","ror":"https://ror.org/05nf32076","country_code":"US","type":"education","lineage":["https://openalex.org/I157394403","https://openalex.org/I2802043390","https://openalex.org/I4210129632"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Strader","raw_affiliation_strings":["Department of Electrical Engineering, Texas A and M University, College Station, TX, USA","MCC, Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Texas A and M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"MCC, Austin, TX, USA","institution_ids":["https://openalex.org/I2802043390"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5017559488"],"corresponding_institution_ids":["https://openalex.org/I2802043390","https://openalex.org/I91045830"],"apc_list":null,"apc_paid":null,"fwci":1.6487,"has_fulltext":false,"cited_by_count":18,"citation_normalized_percentile":{"value":0.83227191,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":"C-35","issue":"10","first_page":"896","last_page":"901"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7040877938270569},{"id":"https://openalex.org/keywords/bit","display_name":"Bit (key)","score":0.6938132047653198},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.674476683139801},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.6501041650772095},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.6437193155288696},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.6120983958244324},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.4664197862148285},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.45366033911705017},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.44199711084365845},{"id":"https://openalex.org/keywords/16-bit","display_name":"16-bit","score":0.42216286063194275},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.23545587062835693},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.21591335535049438},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.19337651133537292},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07812663912773132}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7040877938270569},{"id":"https://openalex.org/C117011727","wikidata":"https://www.wikidata.org/wiki/Q1278488","display_name":"Bit (key)","level":2,"score":0.6938132047653198},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.674476683139801},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.6501041650772095},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.6437193155288696},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.6120983958244324},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.4664197862148285},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.45366033911705017},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.44199711084365845},{"id":"https://openalex.org/C33652231","wikidata":"https://www.wikidata.org/wiki/Q194368","display_name":"16-bit","level":2,"score":0.42216286063194275},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.23545587062835693},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.21591335535049438},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.19337651133537292},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07812663912773132},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tc.1986.1676680","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1986.1676680","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1993803529","https://openalex.org/W2020530545","https://openalex.org/W2023649376","https://openalex.org/W2026445983","https://openalex.org/W2050652156","https://openalex.org/W2073748734","https://openalex.org/W2077300501","https://openalex.org/W2157083818","https://openalex.org/W2321388032"],"related_works":["https://openalex.org/W2081032080","https://openalex.org/W2134733504","https://openalex.org/W2144460576","https://openalex.org/W975020229","https://openalex.org/W1902169700","https://openalex.org/W2502671172","https://openalex.org/W2011273053","https://openalex.org/W2585161597","https://openalex.org/W3149091528","https://openalex.org/W2079229939"],"abstract_inverted_index":{"Bit-sequential":[0],"algorithms":[1,28],"for":[2,8],"arithmetic":[3],"processing":[4,11],"are":[5],"good":[6],"candidates":[7],"VLSI":[9],"signal":[10],"circuits":[12],"because":[13],"of":[14],"their":[15],"canonical":[16],"structure":[17],"and":[18,43],"minimal":[19],"interconnection":[20],"requirements.":[21],"Several":[22],"recent":[23],"papers":[24],"have":[25],"dealt":[26],"with":[27],"that":[29],"accept":[30],"unsigned":[31,46],"binary":[32,47],"inputs,":[33],"one":[34],"bit":[35,41],"at":[36],"a":[37,50],"time,":[38],"least":[39],"significant":[40],"first,":[42],"produce":[44],"an":[45],"product":[48],"in":[49],"bit-serial":[51],"fashion.":[52]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-03-13T16:22:10.518609","created_date":"2025-10-10T00:00:00"}
