{"id":"https://openalex.org/W1770019236","doi":"https://doi.org/10.1109/tc.1983.1676123","title":"Effectiveness of Private Caches in Multiprocessor Systems with Parallel-Pipelined Memories","display_name":"Effectiveness of Private Caches in Multiprocessor Systems with Parallel-Pipelined Memories","publication_year":1983,"publication_date":"1983-01-01","ids":{"openalex":"https://openalex.org/W1770019236","doi":"https://doi.org/10.1109/tc.1983.1676123","mag":"1770019236"},"language":"en","primary_location":{"id":"doi:10.1109/tc.1983.1676123","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1983.1676123","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5030475260","display_name":"Briggs","orcid":null},"institutions":[{"id":"https://openalex.org/I74775410","display_name":"Rice University","ror":"https://ror.org/008zs3103","country_code":"US","type":"education","lineage":["https://openalex.org/I74775410"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Briggs","raw_affiliation_strings":["Department of Electrical Engineering, Rice University","Department of Electrical Engineering, Rice University, Houston, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Rice University","institution_ids":["https://openalex.org/I74775410"]},{"raw_affiliation_string":"Department of Electrical Engineering, Rice University, Houston, TX, USA","institution_ids":["https://openalex.org/I74775410"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5052658972","display_name":"Dubois","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Dubois","raw_affiliation_strings":["Thomson CSF LCR Domaine de Corbeville, Orsay, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Thomson CSF LCR Domaine de Corbeville, Orsay, France","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":3.4056,"has_fulltext":false,"cited_by_count":18,"citation_normalized_percentile":{"value":0.90282337,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"C-32","issue":"1","first_page":"48","last_page":"59"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8540805578231812},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.7093954086303711},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6651155948638916},{"id":"https://openalex.org/keywords/shared-memory","display_name":"Shared memory","score":0.5682199597358704},{"id":"https://openalex.org/keywords/cache-coherence","display_name":"Cache coherence","score":0.5090053081512451},{"id":"https://openalex.org/keywords/false-sharing","display_name":"False sharing","score":0.5044792890548706},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.4977288544178009},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.4853702783584595},{"id":"https://openalex.org/keywords/distributed-memory","display_name":"Distributed memory","score":0.4676629602909088},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.402150422334671},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.2125895917415619}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8540805578231812},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.7093954086303711},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6651155948638916},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.5682199597358704},{"id":"https://openalex.org/C141917322","wikidata":"https://www.wikidata.org/wiki/Q1025017","display_name":"Cache coherence","level":5,"score":0.5090053081512451},{"id":"https://openalex.org/C5165142","wikidata":"https://www.wikidata.org/wiki/Q5432732","display_name":"False sharing","level":5,"score":0.5044792890548706},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.4977288544178009},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.4853702783584595},{"id":"https://openalex.org/C91481028","wikidata":"https://www.wikidata.org/wiki/Q1054686","display_name":"Distributed memory","level":3,"score":0.4676629602909088},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.402150422334671},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.2125895917415619},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tc.1983.1676123","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1983.1676123","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W156791619","https://openalex.org/W1487184349","https://openalex.org/W1514950316","https://openalex.org/W1592472943","https://openalex.org/W1689154679","https://openalex.org/W1769402780","https://openalex.org/W1770019236","https://openalex.org/W1858930491","https://openalex.org/W1971424755","https://openalex.org/W1971767939","https://openalex.org/W1991450610","https://openalex.org/W2008600417","https://openalex.org/W2009598553","https://openalex.org/W2015704557","https://openalex.org/W2016025047","https://openalex.org/W2035259853","https://openalex.org/W2050915056","https://openalex.org/W2061298228","https://openalex.org/W2081928868","https://openalex.org/W2088257029","https://openalex.org/W2094969361","https://openalex.org/W2097621668","https://openalex.org/W2123924156","https://openalex.org/W2131003600","https://openalex.org/W2341059552","https://openalex.org/W4237640345","https://openalex.org/W4253674545","https://openalex.org/W6606321860","https://openalex.org/W6652786614"],"related_works":["https://openalex.org/W2135766592","https://openalex.org/W3216777841","https://openalex.org/W1797968800","https://openalex.org/W1579785083","https://openalex.org/W2110339542","https://openalex.org/W2764760984","https://openalex.org/W2129190953","https://openalex.org/W1965261831","https://openalex.org/W1586815758","https://openalex.org/W2118508246"],"abstract_inverted_index":{"A":[0],"possible":[1],"design":[2],"alternative":[3],"for":[4],"improving":[5],"the":[6,22,33,40,51,68,92,96,101],"performance":[7],"of":[8,53],"a":[9,15,56,75],"multiprocessor":[10,57],"system":[11],"is":[12,62,88],"to":[13,66,90],"insert":[14],"private":[16],"cache":[17],"between":[18],"each":[19],"processor":[20,93],"and":[21,38,64,72,82,95],"shared":[23,60],"memory.":[24],"The":[25,59],"caches":[26,54],"act":[27],"as":[28],"high-speed":[29],"buffers":[30],"by":[31,43,100],"reducing":[32],"effective":[34],"memory":[35,44,61],"access":[36],"time,":[37],"affect":[39],"delays":[41],"caused":[42],"conflicts.":[45],"In":[46],"this":[47],"paper,":[48],"we":[49],"study":[50],"effectiveness":[52],"in":[55],"system.":[58],"pipelined":[63],"interleaved":[65],"improve":[67],"block":[69],"transfer":[70],"rate,":[71],"it":[73],"assumes":[74],"two-dimensional":[76],"organization,":[77],"previously":[78],"studied":[79],"under":[80],"random":[81],"word":[83],"access.":[84],"An":[85],"approximate":[86],"model":[87],"developed":[89],"estimate":[91],"utilization":[94],"speed-up":[97],"improvement":[98],"provided":[99],"caches.":[102]},"counts_by_year":[{"year":2023,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}