{"id":"https://openalex.org/W1689154679","doi":"https://doi.org/10.1109/tc.1982.1675925","title":"Effects of Cache Coherency in Multiprocessors","display_name":"Effects of Cache Coherency in Multiprocessors","publication_year":1982,"publication_date":"1982-11-01","ids":{"openalex":"https://openalex.org/W1689154679","doi":"https://doi.org/10.1109/tc.1982.1675925","mag":"1689154679"},"language":"en","primary_location":{"id":"doi:10.1109/tc.1982.1675925","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1982.1675925","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5052658972","display_name":"Dubois","orcid":null},"institutions":[{"id":"https://openalex.org/I2799818839","display_name":"Thomson Foundation","ror":"https://ror.org/04z3s3f96","country_code":"GB","type":"nonprofit","lineage":["https://openalex.org/I2799818839"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Dubois","raw_affiliation_strings":["Thomson-CSF/LCR Domaine de Corbeville","Thomson CSF LCR Domaine de Corbeville, Orsay, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Thomson-CSF/LCR Domaine de Corbeville","institution_ids":["https://openalex.org/I2799818839"]},{"raw_affiliation_string":"Thomson CSF LCR Domaine de Corbeville, Orsay, France","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5030475260","display_name":"Briggs","orcid":null},"institutions":[{"id":"https://openalex.org/I74775410","display_name":"Rice University","ror":"https://ror.org/008zs3103","country_code":"US","type":"education","lineage":["https://openalex.org/I74775410"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Briggs","raw_affiliation_strings":["Department of Electrical Engineering, Rice University, Houston, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Rice University, Houston, TX, USA","institution_ids":["https://openalex.org/I74775410"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":7.2955,"has_fulltext":false,"cited_by_count":107,"citation_normalized_percentile":{"value":0.96429304,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"C-31","issue":"11","first_page":"1083","last_page":"1099"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10974","display_name":"Advanced Queuing Theory Analysis","score":0.9936000108718872,"subfield":{"id":"https://openalex.org/subfields/1404","display_name":"Management Information Systems"},"field":{"id":"https://openalex.org/fields/14","display_name":"Business, Management and Accounting"},"domain":{"id":"https://openalex.org/domains/2","display_name":"Social Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8687970638275146},{"id":"https://openalex.org/keywords/mesi-protocol","display_name":"MESI protocol","score":0.8488439917564392},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.8148346543312073},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7465085983276367},{"id":"https://openalex.org/keywords/cache-coherence","display_name":"Cache coherence","score":0.677087128162384},{"id":"https://openalex.org/keywords/bus-sniffing","display_name":"Bus sniffing","score":0.6657353043556213},{"id":"https://openalex.org/keywords/cache-invalidation","display_name":"Cache invalidation","score":0.6584142446517944},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.6185786128044128},{"id":"https://openalex.org/keywords/cache-pollution","display_name":"Cache pollution","score":0.5897796154022217},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.5726709365844727},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.5591849684715271},{"id":"https://openalex.org/keywords/mesif-protocol","display_name":"MESIF protocol","score":0.5035516619682312},{"id":"https://openalex.org/keywords/smart-cache","display_name":"Smart Cache","score":0.4758864641189575},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.4309881925582886},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.3889511823654175}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8687970638275146},{"id":"https://openalex.org/C120936851","wikidata":"https://www.wikidata.org/wiki/Q1408065","display_name":"MESI protocol","level":5,"score":0.8488439917564392},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.8148346543312073},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7465085983276367},{"id":"https://openalex.org/C141917322","wikidata":"https://www.wikidata.org/wiki/Q1025017","display_name":"Cache coherence","level":5,"score":0.677087128162384},{"id":"https://openalex.org/C51185590","wikidata":"https://www.wikidata.org/wiki/Q1017228","display_name":"Bus sniffing","level":5,"score":0.6657353043556213},{"id":"https://openalex.org/C25536678","wikidata":"https://www.wikidata.org/wiki/Q5015977","display_name":"Cache invalidation","level":5,"score":0.6584142446517944},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.6185786128044128},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.5897796154022217},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.5726709365844727},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.5591849684715271},{"id":"https://openalex.org/C199979278","wikidata":"https://www.wikidata.org/wiki/Q263221","display_name":"MESIF protocol","level":5,"score":0.5035516619682312},{"id":"https://openalex.org/C167713795","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"Smart Cache","level":5,"score":0.4758864641189575},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.4309881925582886},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.3889511823654175},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tc.1982.1675925","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1982.1675925","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W218328086","https://openalex.org/W1503497706","https://openalex.org/W1514950316","https://openalex.org/W1586380695","https://openalex.org/W1769402780","https://openalex.org/W1969235324","https://openalex.org/W1971424755","https://openalex.org/W1971767939","https://openalex.org/W1991450610","https://openalex.org/W2009598553","https://openalex.org/W2035816212","https://openalex.org/W2061298228","https://openalex.org/W2081928868","https://openalex.org/W2088257029","https://openalex.org/W2097621668","https://openalex.org/W2111670528","https://openalex.org/W2112209757","https://openalex.org/W3019178997","https://openalex.org/W3161713395","https://openalex.org/W4237640345","https://openalex.org/W4253674545","https://openalex.org/W6630149993","https://openalex.org/W6652786614","https://openalex.org/W7018107030"],"related_works":["https://openalex.org/W2290195868","https://openalex.org/W4285204597","https://openalex.org/W1555453305","https://openalex.org/W3193874149","https://openalex.org/W2987765027","https://openalex.org/W2584505417","https://openalex.org/W2047210963","https://openalex.org/W2379215066","https://openalex.org/W2290179447","https://openalex.org/W4304166325"],"abstract_inverted_index":{"In":[0,54],"many":[1],"commercial":[2],"multiprocessor":[3],"systems,":[4],"each":[5,90],"processor":[6],"accesses":[7],"the":[8,19,22,28,39,46,63,75,87,93,100,111,115],"memory":[9],"through":[10],"a":[11,79],"private":[12,52],"cache.":[13],"One":[14],"problem":[15],"that":[16],"could":[17],"limit":[18],"extensibility":[20],"of":[21,30,41,45,62,65,78,89,102,114],"system":[23,81,122],"and":[24,92],"its":[25],"performance":[26],"is":[27,82,107],"enforcement":[29],"cache":[31,66,116],"coherence.":[32],"A":[33,70],"mechanism":[34],"must":[35],"exist":[36],"which":[37],"prevents":[38],"existence":[40],"several":[42],"different":[43,51],"copies":[44],"same":[47],"data":[48,103],"block":[49],"in":[50,68,121],"caches.":[53],"this":[55],"paper,":[56],"we":[57],"present":[58],"an":[59],"in-depth":[60],"analysis":[61],"effects":[64,113],"coherency":[67,117],"multiprocessors.":[69],"novel":[71],"analytical":[72],"model":[73,85],"for":[74],"program":[76],"behavior":[77,88],"multitasked":[80],"introduced.":[83],"The":[84],"includes":[86],"process":[91],"interactions":[94],"between":[95],"processes":[96],"with":[97],"regard":[98],"to":[99,109,119],"sharing":[101],"blocks.":[104],"An":[105],"approximation":[106],"developed":[108],"derive":[110],"main":[112],"contributing":[118],"degradations":[120],"performance.":[123]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
