{"id":"https://openalex.org/W1996007494","doi":"https://doi.org/10.1109/tc.1980.1675614","title":"Physical Versus Logical Fault Models MOS LSI Circuits: Impact on Their Testability","display_name":"Physical Versus Logical Fault Models MOS LSI Circuits: Impact on Their Testability","publication_year":1980,"publication_date":"1980-06-01","ids":{"openalex":"https://openalex.org/W1996007494","doi":"https://doi.org/10.1109/tc.1980.1675614","mag":"1996007494"},"language":"en","primary_location":{"id":"doi:10.1109/tc.1980.1675614","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1980.1675614","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5071823551","display_name":"Galiay","orcid":null},"institutions":[{"id":"https://openalex.org/I88773910","display_name":"Intuit (United States)","ror":"https://ror.org/049mrbr98","country_code":"US","type":"company","lineage":["https://openalex.org/I88773910"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Galiay","raw_affiliation_strings":["Soci&#233;t&#233; pour l'Etude et la Fabrication de Circuits Int&#233;gr&#233;s Sp&#233;ciaux (EFCIS)","Soci\u00e9t\u00e9 pour l'Etude et la Fabrication de Circuits Int\u00e9gr\u00e9s Sp\u00e9ciaux (EFCIS)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Soci&#233;t&#233; pour l'Etude et la Fabrication de Circuits Int&#233;gr&#233;s Sp&#233;ciaux (EFCIS)","institution_ids":["https://openalex.org/I88773910"]},{"raw_affiliation_string":"Soci\u00e9t\u00e9 pour l'Etude et la Fabrication de Circuits Int\u00e9gr\u00e9s Sp\u00e9ciaux (EFCIS)","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082986812","display_name":"Crouzet","orcid":null},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I190497903","display_name":"Laboratoire d'Analyse et d'Architecture des Syst\u00e8mes","ror":"https://ror.org/03vcm6439","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I190497903","https://openalex.org/I193033237","https://openalex.org/I196454796","https://openalex.org/I205747304","https://openalex.org/I4210095849","https://openalex.org/I4210152422","https://openalex.org/I4210159245","https://openalex.org/I4405258862","https://openalex.org/I4405259414"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Crouzet","raw_affiliation_strings":["Laboratoire d'Automatique et d'Analyse des Syst\u00e9mes du, CNRS, Toulouse, France","Laboratoire d'Automatique et d'Analyse des Systemes du CNRS, Toulouse, France#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratoire d'Automatique et d'Analyse des Syst\u00e9mes du, CNRS, Toulouse, France","institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I190497903"]},{"raw_affiliation_string":"Laboratoire d'Automatique et d'Analyse des Systemes du CNRS, Toulouse, France#TAB#","institution_ids":["https://openalex.org/I1294671590"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5008947208","display_name":"Vergniault","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Vergniault","raw_affiliation_strings":["Soci\u00e9t\u00e9 pour l'Etude et la Fabrication de Circuits Int\u00e9gr\u00e9s Sp\u00e9ciaux (EFCIS), Grenoble, France","[Soci\u00e9t\u00e9 pour l'Etude et la Fabrication de Circuits Int\u00e9gr\u00e9s Sp\u00e9ciaux (EFCIS), Grenoble, France]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Soci\u00e9t\u00e9 pour l'Etude et la Fabrication de Circuits Int\u00e9gr\u00e9s Sp\u00e9ciaux (EFCIS), Grenoble, France","institution_ids":[]},{"raw_affiliation_string":"[Soci\u00e9t\u00e9 pour l'Etude et la Fabrication de Circuits Int\u00e9gr\u00e9s Sp\u00e9ciaux (EFCIS), Grenoble, France]","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":20.761,"has_fulltext":false,"cited_by_count":362,"citation_normalized_percentile":{"value":0.99269311,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"C-29","issue":"6","first_page":"527","last_page":"531"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.7551923990249634},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5498858690261841},{"id":"https://openalex.org/keywords/parametric-statistics","display_name":"Parametric statistics","score":0.5253341197967529},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.5119677782058716},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4789626896381378},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.42723801732063293},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3715200126171112},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.20901033282279968},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2068014144897461},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.17006319761276245}],"concepts":[{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.7551923990249634},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5498858690261841},{"id":"https://openalex.org/C117251300","wikidata":"https://www.wikidata.org/wiki/Q1849855","display_name":"Parametric statistics","level":2,"score":0.5253341197967529},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.5119677782058716},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4789626896381378},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.42723801732063293},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3715200126171112},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.20901033282279968},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2068014144897461},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.17006319761276245},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tc.1980.1675614","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1980.1675614","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8700000047683716,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W1785177721","https://openalex.org/W2046817879","https://openalex.org/W2079866295"],"related_works":["https://openalex.org/W2393524141","https://openalex.org/W2365130684","https://openalex.org/W2370255574","https://openalex.org/W2169676947","https://openalex.org/W2906367154","https://openalex.org/W3037788266","https://openalex.org/W2369589212","https://openalex.org/W2049244319","https://openalex.org/W2035482730","https://openalex.org/W1604861690"],"abstract_inverted_index":{"At":[0],"the":[1],"end":[2],"of":[3,16],"an":[4],"IC":[5],"production":[6],"line,":[7],"integrated":[8],"circuits":[9],"are":[10],"generally":[11],"submitted":[12],"to":[13,21,32,44],"three":[14],"kinds":[15],"tests:":[17],"1)":[18],"parametric":[19],"tests":[20,31,43],"check":[22,33,45],"electrical":[23],"characteristics":[24],"(voltage,":[25],"current,":[26],"power":[27],"consumption),":[28],"2)":[29],"dynamic":[30],"response":[34],"times":[35],"under":[36],"nominal":[37],"operating":[38],"conditions,":[39],"and":[40],"3)":[41],"functional":[42],"its":[46],"logical":[47],"behavior.":[48]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-22T07:51:19.307946","created_date":"2025-10-10T00:00:00"}
