{"id":"https://openalex.org/W1846482173","doi":"https://doi.org/10.1109/tc.1978.1675071","title":"9-V Algorithm for Test Pattern Generation of Combinational Digital Circuits","display_name":"9-V Algorithm for Test Pattern Generation of Combinational Digital Circuits","publication_year":1978,"publication_date":"1978-03-01","ids":{"openalex":"https://openalex.org/W1846482173","doi":"https://doi.org/10.1109/tc.1978.1675071","mag":"1846482173"},"language":"en","primary_location":{"id":"doi:10.1109/tc.1978.1675071","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1978.1675071","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5105757126","display_name":"Cha","orcid":null},"institutions":[{"id":"https://openalex.org/I4210129585","display_name":"ID-FISH Technology (United States)","ror":"https://ror.org/03zqwq749","country_code":"US","type":"company","lineage":["https://openalex.org/I4210129585"]},{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]},{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Cha","raw_affiliation_strings":["IBM SPD East Fishkill","IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA","IBM-SPD, Hopewell Junction, NY, USA"],"affiliations":[{"raw_affiliation_string":"IBM SPD East Fishkill","institution_ids":["https://openalex.org/I1341412227","https://openalex.org/I4210129585"]},{"raw_affiliation_string":"IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA","institution_ids":["https://openalex.org/I4210114115"]},{"raw_affiliation_string":"IBM-SPD, Hopewell Junction, NY, USA","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5097636214","display_name":"Donath","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Donath","raw_affiliation_strings":["IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA"],"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA","institution_ids":["https://openalex.org/I4210114115"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5073924404","display_name":"Ozguner","orcid":null},"institutions":[{"id":"https://openalex.org/I48912391","display_name":"Istanbul Technical University","ror":"https://ror.org/059636586","country_code":"TR","type":"education","lineage":["https://openalex.org/I48912391"]},{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["TR","US"],"is_corresponding":false,"raw_author_name":"Ozguner","raw_affiliation_strings":["Department of Electrical Engineering, Technical University Istanbul, Istanbul, Turkey","IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Technical University Istanbul, Istanbul, Turkey","institution_ids":["https://openalex.org/I48912391"]},{"raw_affiliation_string":"IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA","institution_ids":["https://openalex.org/I4210114115"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5105757126"],"corresponding_institution_ids":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210129585"],"apc_list":null,"apc_paid":null,"fwci":1.2915,"has_fulltext":false,"cited_by_count":57,"citation_normalized_percentile":{"value":0.7704918,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":"C-27","issue":"3","first_page":"193","last_page":"200"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.7292860150337219},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.6032769680023193},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5960279107093811},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.588824450969696},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5763317346572876},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.46139976382255554},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.36793339252471924},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3312625288963318},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13308575749397278},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.11500352621078491}],"concepts":[{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.7292860150337219},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.6032769680023193},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5960279107093811},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.588824450969696},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5763317346572876},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.46139976382255554},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.36793339252471924},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3312625288963318},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13308575749397278},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.11500352621078491}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tc.1978.1675071","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1978.1675071","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},{"id":"pmh:oai:polen.itu.edu.tr:11527/51478","is_oa":false,"landing_page_url":"https://hdl.handle.net/11527/51478","pdf_url":null,"source":{"id":"https://openalex.org/S4306400460","display_name":"Istanbul Technical University Academic Open Archive (Istanbul Technical University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I48912391","host_organization_name":"Istanbul Technical University","host_organization_lineage":["https://openalex.org/I48912391"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W290503896","https://openalex.org/W1993225874","https://openalex.org/W2021492392","https://openalex.org/W2044827054","https://openalex.org/W2055013504","https://openalex.org/W2079866295","https://openalex.org/W2084840978","https://openalex.org/W2148195612","https://openalex.org/W2183447937","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W1599245032","https://openalex.org/W2159970201","https://openalex.org/W1834488723","https://openalex.org/W1908304487","https://openalex.org/W2089145539","https://openalex.org/W2150621458","https://openalex.org/W2786835848","https://openalex.org/W2754777461","https://openalex.org/W2032548947","https://openalex.org/W1981782019"],"abstract_inverted_index":{"An":[0],"algorithm":[1,15],"for":[2,6,22,94],"generating":[3],"test":[4,21],"patterns":[5],"combinational":[7],"circuits":[8],"has":[9],"been":[10],"developed":[11],"and":[12,18,42],"programmed.":[13],"The":[14],"is":[16,50,65,88],"definitive":[17],"finds":[19],"a":[20,36,40,54,95],"all":[23],"faults":[24],"including":[25],"those":[26],"that":[27],"require":[28],"multiple":[29],"paths":[30,71],"to":[31],"be":[32],"sensitized,":[33],"by":[34,52],"sensitizing":[35,82],"single":[37,47],"path":[38,64,87],"at":[39,44],"time":[41],"trying":[43],"most":[45],"each":[46],"path.":[48],"This":[49],"achieved":[51],"using":[53],"new":[55],"calculus":[56],"based":[57],"on":[58],"nine":[59],"values":[60,74],"(0,1,D,D\u0304,0/D,0/D\u0304,":[61],"1/D,1/D\u0304,U).":[62],"One":[63],"deliberately":[66],"sensitized":[67,86],"while":[68],"the":[69,77,85],"alternative":[70],"are":[72,92],"assigned":[73],"which":[75],"permit":[76],"option":[78],"of":[79,97],"desensitizing":[80],"or":[81],"them":[83],"as":[84],"developed.":[89],"Experimental":[90],"results":[91],"presented":[93],"variety":[96],"cases.":[98]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-03-06T13:50:29.536080","created_date":"2025-10-10T00:00:00"}