{"id":"https://openalex.org/W1855231947","doi":"https://doi.org/10.1109/tc.1978.1674947","title":"A Restructurable Computer System","display_name":"A Restructurable Computer System","publication_year":1978,"publication_date":"1978-01-01","ids":{"openalex":"https://openalex.org/W1855231947","doi":"https://doi.org/10.1109/tc.1978.1674947","mag":"1855231947"},"language":"en","primary_location":{"id":"doi:10.1109/tc.1978.1674947","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1978.1674947","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5079931339","display_name":"Reddi","orcid":null},"institutions":[{"id":"https://openalex.org/I129331126","display_name":"Gaertner (United States)","ror":"https://ror.org/05ygj1d20","country_code":"US","type":"company","lineage":["https://openalex.org/I129331126"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Reddi","raw_affiliation_strings":["W. W. Gaertner Research, Inc","W. W. Gaertner Research, Inc., Stanford, CT, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"W. W. Gaertner Research, Inc","institution_ids":["https://openalex.org/I129331126"]},{"raw_affiliation_string":"W. W. Gaertner Research, Inc., Stanford, CT, USA","institution_ids":["https://openalex.org/I129331126"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5098320276","display_name":"Feustel","orcid":null},"institutions":[{"id":"https://openalex.org/I74775410","display_name":"Rice University","ror":"https://ror.org/008zs3103","country_code":"US","type":"education","lineage":["https://openalex.org/I74775410"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Feustel","raw_affiliation_strings":["Department of Electrical Engineering, Rice University, Houston, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Rice University, Houston, TX, USA","institution_ids":["https://openalex.org/I74775410"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":5.8333,"has_fulltext":false,"cited_by_count":23,"citation_normalized_percentile":{"value":0.96424923,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":null,"biblio":{"volume":"C-27","issue":"1","first_page":"1","last_page":"20"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12162","display_name":"Cellular Automata and Applications","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8264709115028381},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.6449810266494751},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.5534897446632385},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5392284393310547},{"id":"https://openalex.org/keywords/vector-processor","display_name":"Vector processor","score":0.49433445930480957},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4692302346229553},{"id":"https://openalex.org/keywords/data-structure","display_name":"Data structure","score":0.43842029571533203},{"id":"https://openalex.org/keywords/assembly-language","display_name":"Assembly language","score":0.42232221364974976},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.39376357197761536},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3717353343963623},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3627551198005676},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.35875269770622253},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3221118748188019},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.2332620918750763},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.10989579558372498}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8264709115028381},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.6449810266494751},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.5534897446632385},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5392284393310547},{"id":"https://openalex.org/C161824985","wikidata":"https://www.wikidata.org/wiki/Q919509","display_name":"Vector processor","level":2,"score":0.49433445930480957},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4692302346229553},{"id":"https://openalex.org/C162319229","wikidata":"https://www.wikidata.org/wiki/Q175263","display_name":"Data structure","level":2,"score":0.43842029571533203},{"id":"https://openalex.org/C50831359","wikidata":"https://www.wikidata.org/wiki/Q165436","display_name":"Assembly language","level":3,"score":0.42232221364974976},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.39376357197761536},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3717353343963623},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3627551198005676},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.35875269770622253},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3221118748188019},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.2332620918750763},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.10989579558372498},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tc.1978.1674947","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1978.1674947","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.41999998688697815,"display_name":"Decent work and economic growth","id":"https://metadata.un.org/sdg/8"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W60578787","https://openalex.org/W129923990","https://openalex.org/W1479780447","https://openalex.org/W1497821583","https://openalex.org/W1977704678","https://openalex.org/W2003850193","https://openalex.org/W2016399615","https://openalex.org/W2074175208","https://openalex.org/W2081212630","https://openalex.org/W2092737755","https://openalex.org/W2093765092","https://openalex.org/W2123509893","https://openalex.org/W2144340144","https://openalex.org/W2147504919","https://openalex.org/W2164890169","https://openalex.org/W2170585292","https://openalex.org/W2564609423","https://openalex.org/W4239849307","https://openalex.org/W6731461566"],"related_works":["https://openalex.org/W3037187668","https://openalex.org/W2380685755","https://openalex.org/W2252100032","https://openalex.org/W2963436428","https://openalex.org/W3171253712","https://openalex.org/W1200423363","https://openalex.org/W2612281432","https://openalex.org/W2734796617","https://openalex.org/W2171591485","https://openalex.org/W2003201726"],"abstract_inverted_index":{"This":[0],"paper":[1,104],"presents":[2],"an":[3,28,44],"architecture":[4],"for":[5,19,61,92],"a":[6,47,77,108],"restructurable":[7],"computer":[8],"system":[9,63,113],"which":[10,34],"reconfigures":[11],"its":[12],"resources":[13],"according":[14],"to":[15,52,69,97,114],"the":[16,24,50,62,85,111],"problem":[17],"environment":[18],"efficient":[20,99],"performance.":[21],"It":[22,72],"converts":[23],"user's":[25],"program":[26],"into":[27],"intermediate":[29],"level":[30],"language":[31],"called":[32],"Realist":[33],"is":[35,64,73,105],"capable":[36],"of":[37,110],"specifying":[38],"arbitrary":[39],"resource":[40],"structures":[41],"such":[42],"as":[43],"array":[45],"or":[46],"pipeline":[48],"and":[49,95,101],"computation":[51],"be":[53,82],"performed":[54],"upon":[55],"these":[56],"structures.":[57],"An":[58],"architectural":[59],"design":[60],"presented":[65],"with":[66,107],"special":[67],"attention":[68],"bus":[70],"units.":[71],"shown":[74],"how":[75],"APL,":[76],"vector":[78],"processing":[79],"language,":[80],"can":[81],"implemented":[83],"on":[84],"system.":[86],"Some":[87],"storage":[88],"schemes":[89],"are":[90],"considered":[91],"organizing":[93],"vectors":[94],"matrices":[96],"facilitate":[98],"retrieval":[100],"manipulation.":[102],"The":[103],"concluded":[106],"comparison":[109],"proposed":[112],"existing":[115],"high":[116],"speed":[117],"architectures.":[118]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
