{"id":"https://openalex.org/W2153484041","doi":"https://doi.org/10.1109/tc.1972.5009010","title":"Design of Optimal Switching Networks by Integer Programming","display_name":"Design of Optimal Switching Networks by Integer Programming","publication_year":1972,"publication_date":"1972-06-01","ids":{"openalex":"https://openalex.org/W2153484041","doi":"https://doi.org/10.1109/tc.1972.5009010","mag":"2153484041"},"language":"en","primary_location":{"id":"doi:10.1109/tc.1972.5009010","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1972.5009010","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036195592","display_name":"Saburo Muroga","orcid":null},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Saburo Muroga","raw_affiliation_strings":["Department of Computer Science, University of Illinois, Urbana, IL, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, University of Illinois, Urbana, IL, USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113496426","display_name":"Toshihide Ibaraki","orcid":null},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]},{"id":"https://openalex.org/I22299242","display_name":"Kyoto University","ror":"https://ror.org/02kpeqv85","country_code":"JP","type":"education","lineage":["https://openalex.org/I22299242"]}],"countries":["JP","US"],"is_corresponding":false,"raw_author_name":"Toshihide Ibaraki","raw_affiliation_strings":["Department of Applied Mathematics and Physics, Faculty of Engineering, Kyoto University, Kyoto, Japan","Department of Computer Science, University of Illinois, Urbana, IL, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Applied Mathematics and Physics, Faculty of Engineering, Kyoto University, Kyoto, Japan","institution_ids":["https://openalex.org/I22299242"]},{"raw_affiliation_string":"Department of Computer Science, University of Illinois, Urbana, IL, USA","institution_ids":["https://openalex.org/I157725225"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.6435,"has_fulltext":false,"cited_by_count":34,"citation_normalized_percentile":{"value":0.89708883,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"C-21","issue":"6","first_page":"573","last_page":"582"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10374","display_name":"Advanced Graph Theory Research","score":0.9959999918937683,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/integer-programming","display_name":"Integer programming","score":0.712070107460022},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.618507981300354},{"id":"https://openalex.org/keywords/integer","display_name":"Integer (computer science)","score":0.5828518867492676},{"id":"https://openalex.org/keywords/enumeration","display_name":"Enumeration","score":0.48175477981567383},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.47627753019332886},{"id":"https://openalex.org/keywords/nand-gate","display_name":"NAND gate","score":0.45707589387893677},{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.4377897083759308},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.3648337125778198},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.3481820225715637},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.3308103680610657},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3221566677093506},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.31760093569755554},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.18734732270240784},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.1246669590473175},{"id":"https://openalex.org/keywords/discrete-mathematics","display_name":"Discrete mathematics","score":0.12108960747718811}],"concepts":[{"id":"https://openalex.org/C56086750","wikidata":"https://www.wikidata.org/wiki/Q6042592","display_name":"Integer programming","level":2,"score":0.712070107460022},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.618507981300354},{"id":"https://openalex.org/C97137487","wikidata":"https://www.wikidata.org/wiki/Q729138","display_name":"Integer (computer science)","level":2,"score":0.5828518867492676},{"id":"https://openalex.org/C156340839","wikidata":"https://www.wikidata.org/wiki/Q2704791","display_name":"Enumeration","level":2,"score":0.48175477981567383},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.47627753019332886},{"id":"https://openalex.org/C124296912","wikidata":"https://www.wikidata.org/wiki/Q575178","display_name":"NAND gate","level":3,"score":0.45707589387893677},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.4377897083759308},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3648337125778198},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.3481820225715637},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.3308103680610657},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3221566677093506},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.31760093569755554},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.18734732270240784},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.1246669590473175},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.12108960747718811},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tc.1972.5009010","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1972.5009010","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W3705781","https://openalex.org/W1980311091","https://openalex.org/W2013310157","https://openalex.org/W2028206183","https://openalex.org/W2042037052","https://openalex.org/W2045006900","https://openalex.org/W2071580092","https://openalex.org/W2076756604","https://openalex.org/W2091405247","https://openalex.org/W2093150123","https://openalex.org/W2099740307","https://openalex.org/W2100890245","https://openalex.org/W2111161927","https://openalex.org/W2118690660","https://openalex.org/W4246060548"],"related_works":["https://openalex.org/W108845024","https://openalex.org/W4300125793","https://openalex.org/W2578985712","https://openalex.org/W2406961474","https://openalex.org/W4323268213","https://openalex.org/W3042106073","https://openalex.org/W2143566611","https://openalex.org/W588267724","https://openalex.org/W3170806431","https://openalex.org/W2357289797"],"abstract_inverted_index":{"The":[0,106],"design":[1,167],"of":[2,22,86,91,124,171,175,198,217],"optimal":[3,179,188,192],"logic":[4,23],"networks":[5,28,38,180,190,194],"is":[6,127,140,158],"formulated":[7],"as":[8,49,62,83,153,186],"integer":[9,125,219],"programming":[10,126,220],"(IP)":[11],"problems.":[12,177],"This":[13],"formulation":[14,107],"has":[15],"the":[16,84,89,116,120,144,156,162,172,214,218],"following":[17],"advantages":[18],"over":[19],"other":[20],"methods":[21],"design.":[24],"1)":[25],"General":[26],"feed-forward":[27],"can":[29,76,99,108],"be":[30,77,100,109,130],"dealt":[31],"with":[32,72,205],"rather":[33],"than":[34],"two-level":[35],"or":[36],"three-level":[37],"usually":[39],"treated":[40],"in":[41],"conventional":[42],"switching":[43],"theory.":[44],"2)":[45],"Network":[46],"restrictions":[47,53],"such":[48,61,82,152],"fan-in":[50],"and":[51,69,88,191,209],"fan-out":[52],"are":[54,93,181],"easily":[55],"incorporated.":[56],"3)":[57],"Various":[58,80,178],"gate":[59,207],"types":[60],"NOR,":[63],"NAND,":[64],"AND-OR":[65],"combination,":[66,68],"NOR-AND":[67,193],"those":[70],"gates":[71,87],"NOR-OR":[73],"dual":[74],"outputs":[75],"treated.":[78],"4)":[79],"objectives":[81],"number":[85,90],"connections":[92],"minimized.":[94],"5)":[95],"Incompletely":[96],"specified":[97],"functions":[98,197],"handled":[101],"without":[102],"additional":[103],"difficulty.":[104],"6)":[105],"extended":[110],"to":[111,129,160],"multiple-output":[112],"networks.":[113],"To":[114],"solve":[115,161],"resulting":[117],"IP":[118,133,163],"problems,":[119],"implicit":[121,145],"enumeration":[122,146],"method":[123],"found":[128],"suitable.":[131],"An":[132],"code":[134],"ILLIP":[135,157],"(Illinois":[136],"Integer":[137],"Programming":[138],"Code)":[139],"implemented":[141],"based":[142],"on":[143],"by":[147,168,183],"incorporating":[148],"some":[149],"new":[150],"gimmicks":[151],"pseudounderlining.":[154],"Then":[155],"used":[159],"problems":[164],"for":[165,195],"logical":[166],"making":[169],"use":[170],"inherent":[173],"structure":[174],"our":[176],"derived":[182],"a":[184],"computer":[185],"follows:":[187],"NOR":[189],"all":[196],"up":[199],"through":[200],"three":[201],"variables,":[202],"one-bit":[203],"adders":[204],"various":[206],"types,":[208],"others.":[210],"These":[211],"results":[212],"indicate":[213],"computational":[215],"feasibility":[216],"approach.":[221]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}