{"id":"https://openalex.org/W2096548380","doi":"https://doi.org/10.1109/tc.1968.5008864","title":"Definite Asynchronous Sequential Circuits","display_name":"Definite Asynchronous Sequential Circuits","publication_year":1968,"publication_date":"1968-01-01","ids":{"openalex":"https://openalex.org/W2096548380","doi":"https://doi.org/10.1109/tc.1968.5008864","mag":"2096548380"},"language":"en","primary_location":{"id":"doi:10.1109/tc.1968.5008864","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1968.5008864","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5016883956","display_name":"Janusz Brzozowski","orcid":"https://orcid.org/0000-0003-3390-2767"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]},{"id":"https://openalex.org/I153718931","display_name":"University of Ottawa","ror":"https://ror.org/03c4mmv16","country_code":"CA","type":"education","lineage":["https://openalex.org/I153718931"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Janusz A. Brzozowski","raw_affiliation_strings":["Department of Applied Analysis and Computer Science, University of Waterloo, Waterloo, ONT, Canada","Department of Electrical Engineering, University of Ottawa, Ottawa, ONT, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Applied Analysis and Computer Science, University of Waterloo, Waterloo, ONT, Canada","institution_ids":["https://openalex.org/I151746483"]},{"raw_affiliation_string":"Department of Electrical Engineering, University of Ottawa, Ottawa, ONT, Canada","institution_ids":["https://openalex.org/I153718931"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113606942","display_name":"S.P. Singh","orcid":"https://orcid.org/0009-0005-6537-004X"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]},{"id":"https://openalex.org/I153718931","display_name":"University of Ottawa","ror":"https://ror.org/03c4mmv16","country_code":"CA","type":"education","lineage":["https://openalex.org/I153718931"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Shanker Singh","raw_affiliation_strings":["Department of Applied Analysis and Computer Science, University of Waterloo, Waterloo, ONT, Canada","Department of Electrical Engineering, University of Ottawa, Ottawa, ONT, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Applied Analysis and Computer Science, University of Waterloo, Waterloo, ONT, Canada","institution_ids":["https://openalex.org/I151746483"]},{"raw_affiliation_string":"Department of Electrical Engineering, University of Ottawa, Ottawa, ONT, Canada","institution_ids":["https://openalex.org/I153718931"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":4.0092,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.94205794,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":null,"biblio":{"volume":"C-17","issue":"1","first_page":"18","last_page":"26"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11567","display_name":"semigroups and automata theory","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11567","display_name":"semigroups and automata theory","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9865000247955322,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11130","display_name":"Coding theory and cryptography","score":0.9860000014305115,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.9213733673095703},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.7208532691001892},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6552179455757141},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.5543317198753357},{"id":"https://openalex.org/keywords/asynchronous-system","display_name":"Asynchronous system","score":0.5406716465950012},{"id":"https://openalex.org/keywords/tuple","display_name":"Tuple","score":0.5183833241462708},{"id":"https://openalex.org/keywords/realization","display_name":"Realization (probability)","score":0.499222993850708},{"id":"https://openalex.org/keywords/truth-table","display_name":"Truth table","score":0.4643939137458801},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4354473352432251},{"id":"https://openalex.org/keywords/table","display_name":"Table (database)","score":0.4180956184864044},{"id":"https://openalex.org/keywords/property","display_name":"Property (philosophy)","score":0.4120887815952301},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3836570978164673},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.32677584886550903},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.29770779609680176},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.24215593934059143},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.2024655044078827},{"id":"https://openalex.org/keywords/discrete-mathematics","display_name":"Discrete mathematics","score":0.1517181694507599},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.06464344263076782},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.06387916207313538},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.05991971492767334}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.9213733673095703},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.7208532691001892},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6552179455757141},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.5543317198753357},{"id":"https://openalex.org/C7923308","wikidata":"https://www.wikidata.org/wiki/Q4812211","display_name":"Asynchronous system","level":5,"score":0.5406716465950012},{"id":"https://openalex.org/C118930307","wikidata":"https://www.wikidata.org/wiki/Q600590","display_name":"Tuple","level":2,"score":0.5183833241462708},{"id":"https://openalex.org/C2781089630","wikidata":"https://www.wikidata.org/wiki/Q21856745","display_name":"Realization (probability)","level":2,"score":0.499222993850708},{"id":"https://openalex.org/C56949724","wikidata":"https://www.wikidata.org/wiki/Q219079","display_name":"Truth table","level":2,"score":0.4643939137458801},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4354473352432251},{"id":"https://openalex.org/C45235069","wikidata":"https://www.wikidata.org/wiki/Q278425","display_name":"Table (database)","level":2,"score":0.4180956184864044},{"id":"https://openalex.org/C189950617","wikidata":"https://www.wikidata.org/wiki/Q937228","display_name":"Property (philosophy)","level":2,"score":0.4120887815952301},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3836570978164673},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.32677584886550903},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.29770779609680176},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.24215593934059143},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.2024655044078827},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.1517181694507599},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.06464344263076782},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.06387916207313538},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.05991971492767334},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0},{"id":"https://openalex.org/C124101348","wikidata":"https://www.wikidata.org/wiki/Q172491","display_name":"Data mining","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tc.1968.5008864","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.1968.5008864","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.730.9428","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.730.9428","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://maveric.uwaterloo.ca/reports/1968_IEEETC_BrzozowskiSingh.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W638243357","https://openalex.org/W1001986433","https://openalex.org/W1493925387","https://openalex.org/W2012588232","https://openalex.org/W2013310157","https://openalex.org/W2036335514","https://openalex.org/W2060810175","https://openalex.org/W2085118356","https://openalex.org/W2089904802","https://openalex.org/W2098467469","https://openalex.org/W2319160178","https://openalex.org/W3177082579","https://openalex.org/W6629354890"],"related_works":["https://openalex.org/W2358223609","https://openalex.org/W4312516786","https://openalex.org/W2384756109","https://openalex.org/W2237508561","https://openalex.org/W1592424226","https://openalex.org/W2567985642","https://openalex.org/W4242504396","https://openalex.org/W1482300372","https://openalex.org/W4245315569","https://openalex.org/W2076601101"],"abstract_inverted_index":{"An":[0],"asynchronous":[1,10,57,76,80,99,110,121,147],"unit":[2,58,111,122],"delay":[3],"is":[4,22,50,61,75,83,116],"an":[5],"n":[6,8],"input":[7,29,35],"output":[9,20],"sequential":[11,92,148],"circuit":[12],"in":[13,133],"which":[14],"the":[15,19,25,28,33,40,72,79,87,142],"present":[16],"value":[17,26],"of":[18,27,42,56,86,90,97,109,120,144],"n-tuple":[21,30],"equal":[23],"to":[24,32],"prior":[31],"last":[34],"change.":[36],"This":[37],"paper":[38],"considers":[39],"problem":[41],"determining":[43],"when":[44],"a":[45,53,65,84],"fundamental":[46],"mode":[47],"flow":[48,73,101],"table":[49,74],"realizable":[51],"as":[52],"feedback-free":[54,107],"connection":[55],"delays.":[59],"It":[60],"shown":[62],"that":[63],"such":[64],"realization":[66],"exists":[67],"if":[68,71],"and":[69,113,139,146],"only":[70],"definite,":[77],"where":[78],"definite":[81,88,100,125],"property":[82,89],"modification":[85],"synchronous":[91,145],"machines.":[93,149],"A":[94],"straightforward":[95],"method":[96],"realizing":[98],"tables":[102,126],"without":[103],"critical":[104],"races":[105],"by":[106],"circuits":[108,134],"delays":[112,123],"combinational":[114],"gates":[115],"developed.":[117],"The":[118],"use":[119],"for":[124],"avoids":[127],"complicated":[128],"secondary":[129],"assignment":[130],"problems,":[131],"results":[132],"with":[135],"very":[136],"simple":[137],"structure,":[138],"brings":[140],"closer":[141],"theories":[143]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}