{"id":"https://openalex.org/W2182409346","doi":"https://doi.org/10.1109/ssd.2015.7348264","title":"Two stage CMOS operational transconductance amplifier for front-end electronics design using multiobjective genetic algorithms","display_name":"Two stage CMOS operational transconductance amplifier for front-end electronics design using multiobjective genetic algorithms","publication_year":2015,"publication_date":"2015-03-01","ids":{"openalex":"https://openalex.org/W2182409346","doi":"https://doi.org/10.1109/ssd.2015.7348264","mag":"2182409346"},"language":"en","primary_location":{"id":"doi:10.1109/ssd.2015.7348264","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ssd.2015.7348264","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 12th International Multi-Conference on Systems, Signals &amp; Devices (SSD15)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5024825606","display_name":"Abdelghani Dendouga","orcid":"https://orcid.org/0009-0008-6732-1120"},"institutions":[{"id":"https://openalex.org/I4210102186","display_name":"Centre de D\u00e9veloppement des Technologies Avanc\u00e9es","ror":"https://ror.org/01ay87255","country_code":"DZ","type":"facility","lineage":["https://openalex.org/I4210102186"]}],"countries":["DZ"],"is_corresponding":true,"raw_author_name":"Abdelghani Dendouga","raw_affiliation_strings":["Division Micro\u00e9lectronique et Nanotechnologie, Centre de D\u00e9veloppement des Technologies Avanc\u00e9es, Algiers, Algeria"],"affiliations":[{"raw_affiliation_string":"Division Micro\u00e9lectronique et Nanotechnologie, Centre de D\u00e9veloppement des Technologies Avanc\u00e9es, Algiers, Algeria","institution_ids":["https://openalex.org/I4210102186"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5091332179","display_name":"Slimane Oussalah","orcid":"https://orcid.org/0000-0002-1282-8230"},"institutions":[{"id":"https://openalex.org/I4210102186","display_name":"Centre de D\u00e9veloppement des Technologies Avanc\u00e9es","ror":"https://ror.org/01ay87255","country_code":"DZ","type":"facility","lineage":["https://openalex.org/I4210102186"]}],"countries":["DZ"],"is_corresponding":false,"raw_author_name":"Slimane Oussalah","raw_affiliation_strings":["Division Micro\u00e9lectronique et Nanotechnologie, Centre de D\u00e9veloppement des Technologies Avanc\u00e9es, Algiers, Algeria"],"affiliations":[{"raw_affiliation_string":"Division Micro\u00e9lectronique et Nanotechnologie, Centre de D\u00e9veloppement des Technologies Avanc\u00e9es, Algiers, Algeria","institution_ids":["https://openalex.org/I4210102186"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5024825606"],"corresponding_institution_ids":["https://openalex.org/I4210102186"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.08264304,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"8","issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10848","display_name":"Advanced Multi-Objective Optimization Algorithms","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/operational-transconductance-amplifier","display_name":"Operational transconductance amplifier","score":0.6891826391220093},{"id":"https://openalex.org/keywords/slew-rate","display_name":"Slew rate","score":0.6678675413131714},{"id":"https://openalex.org/keywords/phase-margin","display_name":"Phase margin","score":0.6445297002792358},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6187093257904053},{"id":"https://openalex.org/keywords/transconductance","display_name":"Transconductance","score":0.5649450421333313},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.564292848110199},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5576618313789368},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.4638844132423401},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.45902544260025024},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.43138813972473145},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.42116352915763855},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.3586028814315796},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.33446162939071655},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2585233449935913},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1711735725402832}],"concepts":[{"id":"https://openalex.org/C58117264","wikidata":"https://www.wikidata.org/wiki/Q1239595","display_name":"Operational transconductance amplifier","level":5,"score":0.6891826391220093},{"id":"https://openalex.org/C82517063","wikidata":"https://www.wikidata.org/wiki/Q1591315","display_name":"Slew rate","level":3,"score":0.6678675413131714},{"id":"https://openalex.org/C81455027","wikidata":"https://www.wikidata.org/wiki/Q7180955","display_name":"Phase margin","level":5,"score":0.6445297002792358},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6187093257904053},{"id":"https://openalex.org/C2779283907","wikidata":"https://www.wikidata.org/wiki/Q1632964","display_name":"Transconductance","level":4,"score":0.5649450421333313},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.564292848110199},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5576618313789368},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.4638844132423401},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.45902544260025024},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.43138813972473145},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.42116352915763855},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3586028814315796},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.33446162939071655},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2585233449935913},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1711735725402832}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ssd.2015.7348264","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ssd.2015.7348264","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 12th International Multi-Conference on Systems, Signals &amp; Devices (SSD15)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8500000238418579}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1540425631","https://openalex.org/W1971349346","https://openalex.org/W1973505720","https://openalex.org/W1994218207","https://openalex.org/W2038038283","https://openalex.org/W2066710757","https://openalex.org/W2167327848","https://openalex.org/W2396384021","https://openalex.org/W2503542072","https://openalex.org/W2535746608","https://openalex.org/W2536282357","https://openalex.org/W2541496347","https://openalex.org/W2542253693","https://openalex.org/W4237533301","https://openalex.org/W4237737851","https://openalex.org/W6632321633","https://openalex.org/W6728774065","https://openalex.org/W6728777719"],"related_works":["https://openalex.org/W3113698884","https://openalex.org/W2083204540","https://openalex.org/W2134780641","https://openalex.org/W4376256313","https://openalex.org/W2944533275","https://openalex.org/W4235119538","https://openalex.org/W1983981505","https://openalex.org/W2015045177","https://openalex.org/W2014614213","https://openalex.org/W2102700512"],"abstract_inverted_index":{"In":[0],"this":[1,53],"paper,":[2],"we":[3],"elaborate":[4],"a":[5],"program":[6,82,130],"based":[7],"on":[8],"multi-objective":[9],"genetic":[10,96],"algorithms":[11],"(MOGAs)":[12],"to":[13,25,36,77],"allow":[14],"automated":[15],"optimization":[16,131],"of":[17],"analog":[18,42],"circuits.":[19],"The":[20,81],"proposed":[21],"methodology":[22],"is":[23,83,103,126],"used":[24],"find":[26],"the":[27,98,129],"optimal":[28],"transistors":[29],"sizes":[30],"(length":[31],"and":[32,43,75,132],"width)":[33],"in":[34,52,112],"order":[35],"obtain":[37],"operational":[38,99],"amplifier":[39,101],"performances":[40,49],"for":[41],"mixed":[44],"CMOS-based":[45],"circuit":[46,110],"applications.":[47],"Eight":[48],"are":[50],"considered":[51],"study,":[54],"direct":[55],"current":[56],"(DC)":[57],"gain,":[58],"unity-gain":[59],"bandwidth":[60],"(GBW),":[61],"phase":[62],"margin":[63],"(PM),":[64],"power":[65],"consumption":[66],"(P),":[67],"area":[68],"(A),":[69],"slew":[70],"rate":[71],"(SR),":[72],"thermal":[73],"noise":[74,78],"signal":[76],"ratio":[79],"(SNR).":[80],"solved":[84],"using":[85,92,106],"MATLAB":[86],"Optimization":[87],"Toolbox\u2122":[88],"solvers.":[89],"Also":[90],"by":[91,105],"variables":[93],"obtained":[94],"from":[95],"algorithms,":[97],"transconductance":[100],"(OTA)":[102],"simulated":[104],"Cadence":[107],"Virtuoso":[108],"Spectre":[109],"simulator":[111],"standard":[113],"TSMC":[114],"(Taiwan":[115],"Semiconductor":[116],"Manufacturing":[117],"Company)":[118],"RF":[119],"0.18\u03bcm":[120],"CMOS":[121],"technology.":[122],"A":[123],"good":[124],"agreement":[125],"observed":[127],"between":[128],"electric":[133],"simulation.":[134]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
