{"id":"https://openalex.org/W4384948664","doi":"https://doi.org/10.1109/sp46215.2023.10179399","title":"A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs","display_name":"A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs","publication_year":2023,"publication_date":"2023-05-01","ids":{"openalex":"https://openalex.org/W4384948664","doi":"https://doi.org/10.1109/sp46215.2023.10179399"},"language":"en","primary_location":{"id":"doi:10.1109/sp46215.2023.10179399","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sp46215.2023.10179399","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE Symposium on Security and Privacy (SP)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref","datacite"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://figshare.com/articles/conference_contribution/A_Security_RISC_Microarchitectural_Attacks_on_Hardware_RISC-V_CPUs/24614679","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5063257996","display_name":"Lukas Gerlach","orcid":"https://orcid.org/0000-0001-5467-237X"},"institutions":[{"id":"https://openalex.org/I4210128801","display_name":"Helmholtz Center for Information Security","ror":"https://ror.org/02njgxr09","country_code":"DE","type":"facility","lineage":["https://openalex.org/I1305996414","https://openalex.org/I4210128801"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Lukas Gerlach","raw_affiliation_strings":["CISPA Helmholtz Center for Information Security"],"affiliations":[{"raw_affiliation_string":"CISPA Helmholtz Center for Information Security","institution_ids":["https://openalex.org/I4210128801"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032066840","display_name":"Daniel Weber","orcid":"https://orcid.org/0000-0002-1197-114X"},"institutions":[{"id":"https://openalex.org/I4210128801","display_name":"Helmholtz Center for Information Security","ror":"https://ror.org/02njgxr09","country_code":"DE","type":"facility","lineage":["https://openalex.org/I1305996414","https://openalex.org/I4210128801"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Daniel Weber","raw_affiliation_strings":["CISPA Helmholtz Center for Information Security"],"affiliations":[{"raw_affiliation_string":"CISPA Helmholtz Center for Information Security","institution_ids":["https://openalex.org/I4210128801"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046503029","display_name":"Ruiyi Zhang","orcid":"https://orcid.org/0009-0007-9094-6412"},"institutions":[{"id":"https://openalex.org/I4210128801","display_name":"Helmholtz Center for Information Security","ror":"https://ror.org/02njgxr09","country_code":"DE","type":"facility","lineage":["https://openalex.org/I1305996414","https://openalex.org/I4210128801"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Ruiyi Zhang","raw_affiliation_strings":["CISPA Helmholtz Center for Information Security"],"affiliations":[{"raw_affiliation_string":"CISPA Helmholtz Center for Information Security","institution_ids":["https://openalex.org/I4210128801"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5070469078","display_name":"Michael Schwarz","orcid":"https://orcid.org/0000-0001-6744-3410"},"institutions":[{"id":"https://openalex.org/I4210128801","display_name":"Helmholtz Center for Information Security","ror":"https://ror.org/02njgxr09","country_code":"DE","type":"facility","lineage":["https://openalex.org/I1305996414","https://openalex.org/I4210128801"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Michael Schwarz","raw_affiliation_strings":["CISPA Helmholtz Center for Information Security"],"affiliations":[{"raw_affiliation_string":"CISPA Helmholtz Center for Information Security","institution_ids":["https://openalex.org/I4210128801"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5063257996"],"corresponding_institution_ids":["https://openalex.org/I4210128801"],"apc_list":null,"apc_paid":null,"fwci":4.3207,"has_fulltext":false,"cited_by_count":25,"citation_normalized_percentile":{"value":0.95415686,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"2321","last_page":"2338"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11424","display_name":"Security and Verification in Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11424","display_name":"Security and Verification in Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11241","display_name":"Advanced Malware Detection Techniques","score":0.982200026512146,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11614","display_name":"Cloud Data Security Solutions","score":0.9789999723434448,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.788396954536438},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.7393733859062195},{"id":"https://openalex.org/keywords/x86","display_name":"x86","score":0.6351141333580017},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.607183575630188},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.5926513671875},{"id":"https://openalex.org/keywords/attack-surface","display_name":"Attack surface","score":0.5844302773475647},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5508114695549011},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.5088934898376465},{"id":"https://openalex.org/keywords/arm-architecture","display_name":"ARM architecture","score":0.45016464591026306},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.4453255236148834},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.2819872200489044},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.25530415773391724}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.788396954536438},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.7393733859062195},{"id":"https://openalex.org/C170723468","wikidata":"https://www.wikidata.org/wiki/Q182933","display_name":"x86","level":3,"score":0.6351141333580017},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.607183575630188},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5926513671875},{"id":"https://openalex.org/C2776576444","wikidata":"https://www.wikidata.org/wiki/Q303569","display_name":"Attack surface","level":2,"score":0.5844302773475647},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5508114695549011},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.5088934898376465},{"id":"https://openalex.org/C26771161","wikidata":"https://www.wikidata.org/wiki/Q16980","display_name":"ARM architecture","level":2,"score":0.45016464591026306},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.4453255236148834},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.2819872200489044},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.25530415773391724}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/sp46215.2023.10179399","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sp46215.2023.10179399","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE Symposium on Security and Privacy (SP)","raw_type":"proceedings-article"},{"id":"pmh:oai:figshare.com:article/24614679","is_oa":true,"landing_page_url":"https://figshare.com/articles/conference_contribution/A_Security_RISC_Microarchitectural_Attacks_on_Hardware_RISC-V_CPUs/24614679","pdf_url":null,"source":{"id":"https://openalex.org/S4377196282","display_name":"Figshare","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4210132348","host_organization_name":"Figshare (United Kingdom)","host_organization_lineage":["https://openalex.org/I4210132348"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"},{"id":"doi:10.60882/cispa.24614679.v1","is_oa":true,"landing_page_url":"https://doi.org/10.60882/cispa.24614679.v1","pdf_url":null,"source":{"id":"https://openalex.org/S7407050916","display_name":"CISPA Helmholtz Center","issn_l":null,"issn":[],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":null,"raw_source_name":null,"raw_type":"article"}],"best_oa_location":{"id":"pmh:oai:figshare.com:article/24614679","is_oa":true,"landing_page_url":"https://figshare.com/articles/conference_contribution/A_Security_RISC_Microarchitectural_Attacks_on_Hardware_RISC-V_CPUs/24614679","pdf_url":null,"source":{"id":"https://openalex.org/S4377196282","display_name":"Figshare","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4210132348","host_organization_name":"Figshare (United Kingdom)","host_organization_lineage":["https://openalex.org/I4210132348"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"},"sustainable_development_goals":[{"score":0.41999998688697815,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":87,"referenced_works":["https://openalex.org/W1488058190","https://openalex.org/W1503814339","https://openalex.org/W1934458198","https://openalex.org/W1964281299","https://openalex.org/W2036500156","https://openalex.org/W2056778557","https://openalex.org/W2057949999","https://openalex.org/W2098010707","https://openalex.org/W2131019288","https://openalex.org/W2143835304","https://openalex.org/W2157116240","https://openalex.org/W2163563130","https://openalex.org/W2171667830","https://openalex.org/W2172060328","https://openalex.org/W2255548496","https://openalex.org/W2337480911","https://openalex.org/W2349411859","https://openalex.org/W2510423754","https://openalex.org/W2529582363","https://openalex.org/W2532499458","https://openalex.org/W2562036180","https://openalex.org/W2588464298","https://openalex.org/W2594560662","https://openalex.org/W2664885055","https://openalex.org/W2726246108","https://openalex.org/W2735733036","https://openalex.org/W2744774028","https://openalex.org/W2763937362","https://openalex.org/W2769061097","https://openalex.org/W2775990858","https://openalex.org/W2792446256","https://openalex.org/W2794847599","https://openalex.org/W2886430483","https://openalex.org/W2889199359","https://openalex.org/W2890909432","https://openalex.org/W2945638899","https://openalex.org/W2962832225","https://openalex.org/W2963311060","https://openalex.org/W2965115498","https://openalex.org/W2984020543","https://openalex.org/W3008872115","https://openalex.org/W3036003802","https://openalex.org/W3048784143","https://openalex.org/W3097736620","https://openalex.org/W3101072679","https://openalex.org/W3103451427","https://openalex.org/W3153001680","https://openalex.org/W3161343929","https://openalex.org/W3173132649","https://openalex.org/W3181370975","https://openalex.org/W3214691374","https://openalex.org/W4226502151","https://openalex.org/W4241773843","https://openalex.org/W4242926647","https://openalex.org/W4246977929","https://openalex.org/W4285236231","https://openalex.org/W4287692507","https://openalex.org/W4287883049","https://openalex.org/W4296959850","https://openalex.org/W4299301436","https://openalex.org/W4376456917","https://openalex.org/W6628261430","https://openalex.org/W6633448724","https://openalex.org/W6720296912","https://openalex.org/W6720892955","https://openalex.org/W6729667700","https://openalex.org/W6730757791","https://openalex.org/W6730881097","https://openalex.org/W6736065547","https://openalex.org/W6743325655","https://openalex.org/W6749937547","https://openalex.org/W6754306559","https://openalex.org/W6756740455","https://openalex.org/W6762377113","https://openalex.org/W6762378864","https://openalex.org/W6772375945","https://openalex.org/W6773560647","https://openalex.org/W6778029803","https://openalex.org/W6781718991","https://openalex.org/W6783181973","https://openalex.org/W6792252545","https://openalex.org/W6793621482","https://openalex.org/W6902533906","https://openalex.org/W6902595334","https://openalex.org/W6940342628","https://openalex.org/W6987020231","https://openalex.org/W7055119176"],"related_works":["https://openalex.org/W2057234250","https://openalex.org/W2369102298","https://openalex.org/W88028992","https://openalex.org/W3175617817","https://openalex.org/W2119347856","https://openalex.org/W2090939166","https://openalex.org/W2149675621","https://openalex.org/W2544369712","https://openalex.org/W2164655372","https://openalex.org/W3015480182"],"abstract_inverted_index":{"Microarchitectural":[0],"attacks":[1,16,148,174],"threaten":[2],"the":[3,10,37,40,46,51,61,67,72,85,106,128,167,180,200,204],"security":[4],"of":[5,12,29,39,48,63,71,211],"computer":[6],"systems":[7,97],"even":[8],"in":[9,94,175],"absence":[11],"software":[13],"vulnerabilities.":[14],"Such":[15],"are":[17,59],"well":[18],"explored":[19],"on":[20,60,195],"x86":[21],"and":[22,45,110,134,160,186],"ARM":[23],"CPUs,":[24,153],"with":[25],"a":[26,99,118,187,212],"wide":[27],"range":[28],"proposed":[30],"but":[31],"not-yet":[32],"deployed":[33],"hardware":[34,76,158],"countermeasures.":[35],"With":[36],"standardization":[38],"RISC-V":[41,57,75,90,96,152],"instruction":[42],"set":[43],"architecture":[44,52,131],"announcement":[47],"support":[49],"for":[50,132,190],"by":[53],"major":[54],"processor":[55],"vendors,":[56],"CPUs":[58,77,92],"verge":[62],"becoming":[64],"ubiquitous.":[65],"However,":[66],"microarchitectural":[68,107,114,168,183,205],"attack":[69,108,115,122,169,206],"surface":[70,109,207],"first":[73,181],"commercially-available":[74,87],"still":[78],"needs":[79],"to":[80,139,150,156,202],"be":[81],"explored.This":[82],"paper":[83],"analyzes":[84],"two":[86],"off-the-shelf":[88],"64-bit":[89],"(hardware)":[91],"used":[93],"most":[95],"running":[98],"full-fledged":[100],"commodity":[101],"Linux":[102],"system.":[103],"We":[104,142,171],"evaluate":[105],"introduce":[111],"3":[112],"new":[113],"techniques:":[116],"Cache+Time,":[117],"novel":[119],"cache-line-granular":[120],"cache":[121,130],"without":[123],"shared":[124],"memory,":[125],"Flush+Fault":[126],"exploiting":[127,136],"Harvard":[129],"Flush+Reload,":[133],"CycleDrift":[135],"unprivileged":[137],"access":[138],"instruction-retirement":[140],"information.":[141],"also":[143],"show":[144],"that":[145,163],"many":[146],"known":[147],"apply":[149],"these":[151],"mainly":[154],"due":[155],"non-existing":[157],"countermeasures":[159],"instruction-set":[161],"subtleties":[162],"do":[164],"not":[165],"consider":[166,203],"surface.":[170],"demonstrate":[172],"our":[173,196],"6":[176],"case":[177],"studies,":[178],"including":[179,215],"RISC-V-specific":[182],"KASLR":[184],"break":[185],"CycleDrift-based":[188],"method":[189],"detecting":[191],"kernel":[192],"activity.":[193],"Based":[194],"analysis,":[197],"we":[198],"stress":[199],"need":[201],"during":[208],"every":[209],"step":[210],"CPU":[213],"design,":[214],"custom":[216],"ISA":[217],"extensions.":[218]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":18},{"year":2024,"cited_by_count":5},{"year":2023,"cited_by_count":1}],"updated_date":"2026-04-10T15:06:20.359241","created_date":"2025-10-10T00:00:00"}