{"id":"https://openalex.org/W2067015985","doi":"https://doi.org/10.1109/soccon.2009.5398053","title":"Improved write margin 6T-SRAM for low supply voltage applications","display_name":"Improved write margin 6T-SRAM for low supply voltage applications","publication_year":2009,"publication_date":"2009-09-01","ids":{"openalex":"https://openalex.org/W2067015985","doi":"https://doi.org/10.1109/soccon.2009.5398053","mag":"2067015985"},"language":"en","primary_location":{"id":"doi:10.1109/soccon.2009.5398053","is_oa":false,"landing_page_url":"https://doi.org/10.1109/soccon.2009.5398053","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE International SOC Conference (SOCC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5043716992","display_name":"Farshad Moradi","orcid":"https://orcid.org/0000-0001-7077-8545"},"institutions":[{"id":"https://openalex.org/I184942183","display_name":"University of Oslo","ror":"https://ror.org/01xtthb56","country_code":"NO","type":"education","lineage":["https://openalex.org/I184942183"]}],"countries":["NO"],"is_corresponding":false,"raw_author_name":"Farshad Moradi","raw_affiliation_strings":["Nanoelectronics Group, University of Oslo, Oslo, NORWAY","Nanoelectronics group, Department of Informatics, University of Oslo, NO-0316 Oslo, Norway"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Nanoelectronics Group, University of Oslo, Oslo, NORWAY","institution_ids":["https://openalex.org/I184942183"]},{"raw_affiliation_string":"Nanoelectronics group, Department of Informatics, University of Oslo, NO-0316 Oslo, Norway","institution_ids":["https://openalex.org/I184942183"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081565415","display_name":"Dag T. Wisland","orcid":"https://orcid.org/0000-0002-3678-3946"},"institutions":[{"id":"https://openalex.org/I184942183","display_name":"University of Oslo","ror":"https://ror.org/01xtthb56","country_code":"NO","type":"education","lineage":["https://openalex.org/I184942183"]}],"countries":["NO"],"is_corresponding":false,"raw_author_name":"Dag T. Wisland","raw_affiliation_strings":["Nanoelectronics Group, University of Oslo, Oslo, NORWAY","Nanoelectronics group, Department of Informatics, University of Oslo, NO-0316 Oslo, Norway"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Nanoelectronics Group, University of Oslo, Oslo, NORWAY","institution_ids":["https://openalex.org/I184942183"]},{"raw_affiliation_string":"Nanoelectronics group, Department of Informatics, University of Oslo, NO-0316 Oslo, Norway","institution_ids":["https://openalex.org/I184942183"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066983905","display_name":"Hamid Mahmoodi","orcid":"https://orcid.org/0000-0003-4237-3086"},"institutions":[{"id":"https://openalex.org/I71838634","display_name":"San Francisco State University","ror":"https://ror.org/05ykr0121","country_code":"US","type":"education","lineage":["https://openalex.org/I71838634"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hamid Mahmoodi","raw_affiliation_strings":["School of Engineering San Francisco State University, San Francisco, CA, USA","School of Engineering San Francisco State University, 1600 Holloway Avenue, San Francisco, CA 94132, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Engineering San Francisco State University, San Francisco, CA, USA","institution_ids":["https://openalex.org/I71838634"]},{"raw_affiliation_string":"School of Engineering San Francisco State University, 1600 Holloway Avenue, San Francisco, CA 94132, USA","institution_ids":["https://openalex.org/I71838634"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5105837607","display_name":"Tuan Vu Cao","orcid":null},"institutions":[{"id":"https://openalex.org/I184942183","display_name":"University of Oslo","ror":"https://ror.org/01xtthb56","country_code":"NO","type":"education","lineage":["https://openalex.org/I184942183"]}],"countries":["NO"],"is_corresponding":false,"raw_author_name":"Tuan Vu Cao","raw_affiliation_strings":["Nanoelectronics Group, University of Oslo, Oslo, NORWAY","Nanoelectronics group, Department of Informatics, University of Oslo, NO-0316 Oslo, Norway"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Nanoelectronics Group, University of Oslo, Oslo, NORWAY","institution_ids":["https://openalex.org/I184942183"]},{"raw_affiliation_string":"Nanoelectronics group, Department of Informatics, University of Oslo, NO-0316 Oslo, Norway","institution_ids":["https://openalex.org/I184942183"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"223","last_page":"226"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.9024513959884644},{"id":"https://openalex.org/keywords/pmos-logic","display_name":"PMOS logic","score":0.8851156234741211},{"id":"https://openalex.org/keywords/subthreshold-conduction","display_name":"Subthreshold conduction","score":0.811245858669281},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.601687490940094},{"id":"https://openalex.org/keywords/margin","display_name":"Margin (machine learning)","score":0.5918909311294556},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5674493312835693},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.5267940163612366},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5170924663543701},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.373879611492157},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.2948419451713562},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.277121901512146},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19719824194908142},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.19140586256980896}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.9024513959884644},{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.8851156234741211},{"id":"https://openalex.org/C156465305","wikidata":"https://www.wikidata.org/wiki/Q1658601","display_name":"Subthreshold conduction","level":4,"score":0.811245858669281},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.601687490940094},{"id":"https://openalex.org/C774472","wikidata":"https://www.wikidata.org/wiki/Q6760393","display_name":"Margin (machine learning)","level":2,"score":0.5918909311294556},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5674493312835693},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.5267940163612366},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5170924663543701},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.373879611492157},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.2948419451713562},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.277121901512146},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19719824194908142},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.19140586256980896},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/soccon.2009.5398053","is_oa":false,"landing_page_url":"https://doi.org/10.1109/soccon.2009.5398053","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE International SOC Conference (SOCC)","raw_type":"proceedings-article"},{"id":"pmh:oai:pure.atira.dk:publications/67193e7e-256e-4c00-a9b7-abe8f03fb4fb","is_oa":false,"landing_page_url":"http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5398053","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Moradi, F, Wisland, D T, Mahmoodi, H & Tuan Vu, C 2009, 'Improved write margin 6T-SRAM for low supply voltage applications', Paper presented at IEEE International SOC Conference, Belfast, Ireland, 09/09/2009 - 11/09/2009. < http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5398053 >","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.6000000238418579}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1540493384","https://openalex.org/W2002612140","https://openalex.org/W2101003251","https://openalex.org/W2115061871","https://openalex.org/W2123278390","https://openalex.org/W2129412844","https://openalex.org/W2132357267","https://openalex.org/W2155153274","https://openalex.org/W2172203429","https://openalex.org/W2545471485","https://openalex.org/W3148792909","https://openalex.org/W6685214562"],"related_works":["https://openalex.org/W1534657026","https://openalex.org/W4398784231","https://openalex.org/W1845449242","https://openalex.org/W2117824263","https://openalex.org/W4388836178","https://openalex.org/W2031972468","https://openalex.org/W1510452813","https://openalex.org/W2128000918","https://openalex.org/W2918058197","https://openalex.org/W2134421493"],"abstract_inverted_index":{"In":[0,40],"this":[1,17,41,65],"paper":[2],"a":[3,36],"new":[4],"technique":[5,18,66],"to":[6,48,69],"increase":[7],"the":[8,19,29,50],"write":[9,51],"margin":[10],"of":[11,21,56,73],"6T-SRAM":[12,74],"cell":[13,24],"is":[14,25,32,46,67],"proposed.":[15],"Using":[16],"area":[20,38,71],"subthreshold":[22,76],"SRAM":[23],"reduced":[26],"and":[27],"also":[28],"Write":[30],"cycle":[31],"improved":[33],"significantly":[34],"with":[35],"lower":[37],"overhead.":[39],"technique,":[42],"PMOS":[43],"stacked":[44],"network":[45],"used":[47],"evaluate":[49],"cycle.":[52],"Based":[53],"on":[54],"behavior":[55],"devices":[57],"in":[58,75],"65":[59],"nm":[60],"for":[61],"weak":[62],"inversion":[63],"operation,":[64],"proposed":[68],"decrease":[70],"overhead":[72],"region.":[77]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
