{"id":"https://openalex.org/W2030503305","doi":"https://doi.org/10.1109/soccon.2009.5398016","title":"A floorplan-aware interactive tool flow for NoC design and synthesis","display_name":"A floorplan-aware interactive tool flow for NoC design and synthesis","publication_year":2009,"publication_date":"2009-09-01","ids":{"openalex":"https://openalex.org/W2030503305","doi":"https://doi.org/10.1109/soccon.2009.5398016","mag":"2030503305"},"language":"en","primary_location":{"id":"doi:10.1109/soccon.2009.5398016","is_oa":false,"landing_page_url":"https://doi.org/10.1109/soccon.2009.5398016","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE International SOC Conference (SOCC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5054928425","display_name":"Mohammad Reza Kakoee","orcid":null},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Mohammad reza Kakoee","raw_affiliation_strings":["DEIS, University of Bologna, Italy","[DEIS University of Bologna, Italy]"],"affiliations":[{"raw_affiliation_string":"DEIS, University of Bologna, Italy","institution_ids":["https://openalex.org/I9360294"]},{"raw_affiliation_string":"[DEIS University of Bologna, Italy]","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007083009","display_name":"Federico Angiolin","orcid":null},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Federico Angiolin","raw_affiliation_strings":["EPFL, LSI, Switzerland","LSI, EPFL, Switzerland"],"affiliations":[{"raw_affiliation_string":"EPFL, LSI, Switzerland","institution_ids":["https://openalex.org/I5124864"]},{"raw_affiliation_string":"LSI, EPFL, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077839627","display_name":"Srinivasan Murali","orcid":"https://orcid.org/0000-0002-4019-8272"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Srinivasan Murali","raw_affiliation_strings":["EPFL, LSI, Switzerland","LSI, EPFL, Switzerland"],"affiliations":[{"raw_affiliation_string":"EPFL, LSI, Switzerland","institution_ids":["https://openalex.org/I5124864"]},{"raw_affiliation_string":"LSI, EPFL, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079755983","display_name":"Antonio Pullini","orcid":"https://orcid.org/0000-0001-6709-4214"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Antonio Pullini","raw_affiliation_strings":["EPFL, LSI, Switzerland","LSI, EPFL, Switzerland"],"affiliations":[{"raw_affiliation_string":"EPFL, LSI, Switzerland","institution_ids":["https://openalex.org/I5124864"]},{"raw_affiliation_string":"LSI, EPFL, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015409850","display_name":"Ciprian Seiculescu","orcid":null},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Ciprian Seiculescu","raw_affiliation_strings":["EPFL, LSI, Switzerland","LSI, EPFL, Switzerland"],"affiliations":[{"raw_affiliation_string":"EPFL, LSI, Switzerland","institution_ids":["https://openalex.org/I5124864"]},{"raw_affiliation_string":"LSI, EPFL, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043408422","display_name":"Luca Benini","orcid":"https://orcid.org/0000-0001-8068-3806"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]},{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["CH","IT"],"is_corresponding":false,"raw_author_name":"Luca Benini","raw_affiliation_strings":["DEIS, University of Bologna, Italy","LSI, EPFL, Switzerland"],"affiliations":[{"raw_affiliation_string":"DEIS, University of Bologna, Italy","institution_ids":["https://openalex.org/I9360294"]},{"raw_affiliation_string":"LSI, EPFL, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5054928425"],"corresponding_institution_ids":["https://openalex.org/I9360294"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.11827722,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"379","last_page":"382"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/toolchain","display_name":"Toolchain","score":0.9843736290931702},{"id":"https://openalex.org/keywords/floorplan","display_name":"Floorplan","score":0.9398877620697021},{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.9172125458717346},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7166545391082764},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.6763145327568054},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.6420499086380005},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.6032203435897827},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5275040864944458},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.5085886716842651},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.4507014751434326},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.44000136852264404},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.21113824844360352},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.17098098993301392},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.11353382468223572}],"concepts":[{"id":"https://openalex.org/C2777062904","wikidata":"https://www.wikidata.org/wiki/Q545406","display_name":"Toolchain","level":3,"score":0.9843736290931702},{"id":"https://openalex.org/C130145326","wikidata":"https://www.wikidata.org/wiki/Q1553985","display_name":"Floorplan","level":2,"score":0.9398877620697021},{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.9172125458717346},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7166545391082764},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.6763145327568054},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.6420499086380005},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.6032203435897827},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5275040864944458},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.5085886716842651},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.4507014751434326},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.44000136852264404},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.21113824844360352},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.17098098993301392},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.11353382468223572},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/soccon.2009.5398016","is_oa":false,"landing_page_url":"https://doi.org/10.1109/soccon.2009.5398016","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE International SOC Conference (SOCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5199999809265137,"id":"https://metadata.un.org/sdg/11","display_name":"Sustainable cities and communities"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1501077214","https://openalex.org/W1549183338","https://openalex.org/W1600358781","https://openalex.org/W2041074866","https://openalex.org/W2102128779","https://openalex.org/W2106665917","https://openalex.org/W2123456523","https://openalex.org/W2125501216","https://openalex.org/W2126973252","https://openalex.org/W2127430446","https://openalex.org/W2132249049","https://openalex.org/W2156954907","https://openalex.org/W2160642395","https://openalex.org/W3147963936","https://openalex.org/W4247314338","https://openalex.org/W4285719527","https://openalex.org/W6632961094","https://openalex.org/W6675596683"],"related_works":["https://openalex.org/W4245336546","https://openalex.org/W2038511870","https://openalex.org/W2037756218","https://openalex.org/W2123076670","https://openalex.org/W3129822007","https://openalex.org/W1941005775","https://openalex.org/W2059633553","https://openalex.org/W2781601456","https://openalex.org/W2030503305","https://openalex.org/W2350308400"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"we":[3],"present":[4],"a":[5,15,66],"floorplan-aware":[6],"toolchain":[7],"for":[8,47],"NoC":[9],"design":[10,20],"and":[11,39,45,71,104],"synthesis":[12,38],"integrated":[13],"with":[14,29,42],"graphical":[16],"front-end.":[17],"The":[18],"resulting":[19],"methodology":[21],"is":[22],"highly":[23],"automated":[24],"yet":[25],"entails":[26],"rich":[27],"interaction":[28,100],"the":[30,52,78,85,88,94,98,102,105],"user,":[31],"spanning":[32],"across":[33],"traffic":[34],"flow":[35],"specification,":[36],"topology":[37],"physical":[40],"floorplanning,":[41],"back-annotation":[43],"capabilities":[44],"opportunities":[46],"incremental":[48],"design.":[49],"We":[50,61],"exploit":[51],"proposed":[53,80,106],"tool":[54],"to":[55,77,93],"implement":[56],"some":[57],"NoC-based":[58],"case":[59],"studies.":[60],"show":[62],"that":[63,84],"not":[64],"only":[65],"great":[67],"amount":[68],"of":[69,87],"time":[70],"effort":[72],"can":[73],"be":[74],"saved":[75],"thanks":[76],"easy-to-use":[79],"environment,":[81],"but":[82],"also":[83],"quality":[86],"final":[89],"netlist":[90],"improves":[91],"due":[92],"optimizations":[95],"unlocked":[96],"by":[97],"early-stage":[99],"among":[101],"designer":[103],"toolchain.":[107]},"counts_by_year":[{"year":2018,"cited_by_count":2},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}