{"id":"https://openalex.org/W4304140739","doi":"https://doi.org/10.1109/socc56010.2022.9908126","title":"Implementation and Evaluation of Deep Neural Networks in Commercially Available Processing in Memory Hardware","display_name":"Implementation and Evaluation of Deep Neural Networks in Commercially Available Processing in Memory Hardware","publication_year":2022,"publication_date":"2022-09-05","ids":{"openalex":"https://openalex.org/W4304140739","doi":"https://doi.org/10.1109/socc56010.2022.9908126"},"language":"en","primary_location":{"id":"doi:10.1109/socc56010.2022.9908126","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc56010.2022.9908126","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE 35th International System-on-Chip Conference (SOCC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5023800995","display_name":"Prangon Das","orcid":"https://orcid.org/0000-0002-6135-5732"},"institutions":[{"id":"https://openalex.org/I155173764","display_name":"Rochester Institute of Technology","ror":"https://ror.org/00v4yb702","country_code":"US","type":"education","lineage":["https://openalex.org/I155173764"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Prangon Das","raw_affiliation_strings":["Rochester Institute of Technology,Department of Computer Engineering,Rochester,NY,USA","Department of Computer Engineering, Rochester Institute of Technology, Rochester, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Rochester Institute of Technology,Department of Computer Engineering,Rochester,NY,USA","institution_ids":["https://openalex.org/I155173764"]},{"raw_affiliation_string":"Department of Computer Engineering, Rochester Institute of Technology, Rochester, NY, USA","institution_ids":["https://openalex.org/I155173764"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021789107","display_name":"Purab Ranjan Sutradhar","orcid":"https://orcid.org/0000-0003-3155-1115"},"institutions":[{"id":"https://openalex.org/I155173764","display_name":"Rochester Institute of Technology","ror":"https://ror.org/00v4yb702","country_code":"US","type":"education","lineage":["https://openalex.org/I155173764"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Purab Ranjan Sutradhar","raw_affiliation_strings":["Rochester Institute of Technology,Department of Computer Engineering,Rochester,NY,USA","Department of Computer Engineering, Rochester Institute of Technology, Rochester, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Rochester Institute of Technology,Department of Computer Engineering,Rochester,NY,USA","institution_ids":["https://openalex.org/I155173764"]},{"raw_affiliation_string":"Department of Computer Engineering, Rochester Institute of Technology, Rochester, NY, USA","institution_ids":["https://openalex.org/I155173764"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047142572","display_name":"Mark Indovina","orcid":"https://orcid.org/0000-0002-6645-4596"},"institutions":[{"id":"https://openalex.org/I155173764","display_name":"Rochester Institute of Technology","ror":"https://ror.org/00v4yb702","country_code":"US","type":"education","lineage":["https://openalex.org/I155173764"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mark Indovina","raw_affiliation_strings":["Rochester Institute of Technology,Department of Electrical and Microelectronic Engineering,Rochester,NY,USA","Department of Electrical and Microelectronic Engineering, Rochester Institute of Technology, Rochester, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Rochester Institute of Technology,Department of Electrical and Microelectronic Engineering,Rochester,NY,USA","institution_ids":["https://openalex.org/I155173764"]},{"raw_affiliation_string":"Department of Electrical and Microelectronic Engineering, Rochester Institute of Technology, Rochester, NY, USA","institution_ids":["https://openalex.org/I155173764"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047725314","display_name":"Sai Manoj Pudukotai Dinakarrao","orcid":"https://orcid.org/0000-0002-4417-2387"},"institutions":[{"id":"https://openalex.org/I162714631","display_name":"George Mason University","ror":"https://ror.org/02jqj7156","country_code":"US","type":"education","lineage":["https://openalex.org/I162714631"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sai Manoj Pudukotai Dinakarrao","raw_affiliation_strings":["George Mason University,Department of Electrical and Computer Engineering,Fairfax,VA,USA","Department of Electrical and Computer Engineering, George Mason University, Fairfax, VA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"George Mason University,Department of Electrical and Computer Engineering,Fairfax,VA,USA","institution_ids":["https://openalex.org/I162714631"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, George Mason University, Fairfax, VA, USA","institution_ids":["https://openalex.org/I162714631"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5004368293","display_name":"Amlan Ganguly","orcid":"https://orcid.org/0000-0001-7354-7873"},"institutions":[{"id":"https://openalex.org/I155173764","display_name":"Rochester Institute of Technology","ror":"https://ror.org/00v4yb702","country_code":"US","type":"education","lineage":["https://openalex.org/I155173764"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Amlan Ganguly","raw_affiliation_strings":["Rochester Institute of Technology,Department of Computer Engineering,Rochester,NY,USA","Department of Computer Engineering, Rochester Institute of Technology, Rochester, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Rochester Institute of Technology,Department of Computer Engineering,Rochester,NY,USA","institution_ids":["https://openalex.org/I155173764"]},{"raw_affiliation_string":"Department of Computer Engineering, Rochester Institute of Technology, Rochester, NY, USA","institution_ids":["https://openalex.org/I155173764"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.7261,"has_fulltext":false,"cited_by_count":18,"citation_normalized_percentile":{"value":0.85847595,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9950000047683716,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8319810032844543},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6795459389686584},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.6780292987823486},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.509053647518158},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.4920613169670105},{"id":"https://openalex.org/keywords/domain","display_name":"Domain (mathematical analysis)","score":0.4596227705478668},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.43936628103256226},{"id":"https://openalex.org/keywords/acceleration","display_name":"Acceleration","score":0.4261905252933502},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.41567695140838623},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.41404715180397034},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3754027783870697},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.353525847196579},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3251839876174927},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.27183955907821655},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.2224496304988861},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.09542757272720337},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.08322367072105408}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8319810032844543},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6795459389686584},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.6780292987823486},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.509053647518158},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.4920613169670105},{"id":"https://openalex.org/C36503486","wikidata":"https://www.wikidata.org/wiki/Q11235244","display_name":"Domain (mathematical analysis)","level":2,"score":0.4596227705478668},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.43936628103256226},{"id":"https://openalex.org/C117896860","wikidata":"https://www.wikidata.org/wiki/Q11376","display_name":"Acceleration","level":2,"score":0.4261905252933502},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.41567695140838623},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.41404715180397034},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3754027783870697},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.353525847196579},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3251839876174927},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.27183955907821655},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.2224496304988861},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.09542757272720337},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.08322367072105408},{"id":"https://openalex.org/C74650414","wikidata":"https://www.wikidata.org/wiki/Q11397","display_name":"Classical mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/socc56010.2022.9908126","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc56010.2022.9908126","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE 35th International System-on-Chip Conference (SOCC)","raw_type":"proceedings-article"},{"id":"pmh:oai:scholarworks.rit.edu:theses-12335","is_oa":false,"landing_page_url":"https://scholarworks.rit.edu/theses/11203","pdf_url":null,"source":{"id":"https://openalex.org/S4306402456","display_name":"RIT Scholar Works (Rochester Institute of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I155173764","host_organization_name":"Rochester Institute of Technology","host_organization_lineage":["https://openalex.org/I155173764"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Theses","raw_type":"text"},{"id":"pmh:oai:repository.rit.edu:theses-12335","is_oa":false,"landing_page_url":"https://repository.rit.edu/theses/11203","pdf_url":null,"source":{"id":"https://openalex.org/S4306402456","display_name":"RIT Scholar Works (Rochester Institute of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I155173764","host_organization_name":"Rochester Institute of Technology","host_organization_lineage":["https://openalex.org/I155173764"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Theses","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4699999988079071,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W2014555481","https://openalex.org/W2018761720","https://openalex.org/W2058490651","https://openalex.org/W2086112773","https://openalex.org/W2097586424","https://openalex.org/W2260663238","https://openalex.org/W2725001169","https://openalex.org/W2749371864","https://openalex.org/W2765234579","https://openalex.org/W2904200161","https://openalex.org/W2946829484","https://openalex.org/W3045328293","https://openalex.org/W3163089509","https://openalex.org/W3193414970","https://openalex.org/W4200007275","https://openalex.org/W4293584584","https://openalex.org/W6692521979","https://openalex.org/W6740103103","https://openalex.org/W6750227808"],"related_works":["https://openalex.org/W1572523360","https://openalex.org/W2364531466","https://openalex.org/W1513409726","https://openalex.org/W2805391225","https://openalex.org/W2383828164","https://openalex.org/W2793542907","https://openalex.org/W3191939515","https://openalex.org/W4304140739","https://openalex.org/W2946544607","https://openalex.org/W2018363491"],"abstract_inverted_index":{"Deep":[0],"Neural":[1],"Networks":[2],"(DNNs)":[3],"are":[4,24],"often":[5],"associated":[6],"with":[7,95,131],"a":[8,53],"large":[9],"number":[10],"of":[11,56,63,82,116,127],"data-parallel":[12,57],"computations.":[13],"Therefore,":[14],"data-centric":[15],"computing":[16],"paradigms,":[17],"such":[18],"as":[19],"Processing":[20],"in":[21],"Memory":[22],"(PIM),":[23],"being":[25],"widely":[26],"explored":[27,70],"for":[28,52],"DNN":[29,64,129],"acceleration":[30,65],"applications.":[31,58],"A":[32],"recent":[33],"PIM":[34,73,87,136],"architecture,":[35],"developed":[36],"and":[37,99],"commercialized":[38],"by":[39],"the":[40,60,85,109,113,117,120,125],"UPMEM":[41,86,121],"company,":[42],"has":[43],"demonstrated":[44],"impressive":[45],"performance":[46,126],"boost":[47],"over":[48],"traditional":[49],"CPU-based":[50],"systems":[51],"wide":[54],"range":[55],"However,":[59],"application":[61],"domain":[62],"is":[66],"yet":[67],"to":[68],"be":[69],"on":[71,84,108,119],"this":[72,76],"platform.":[74],"In":[75],"work,":[77],"we":[78,123],"present":[79],"successful":[80],"implementations":[81],"DNNs":[83,118],"system.":[88],"We":[89],"explore":[90],"multiple":[91],"operation":[92],"mapping":[93],"schemes":[94],"different":[96],"optimization":[97],"goals":[98],"accelerate":[100],"two":[101],"CNN":[102],"algorithms":[103],"using":[104],"these":[105],"schemes.":[106],"Based":[107],"data":[110],"achieved":[111],"from":[112],"physical":[114],"implementation":[115,130],"system,":[122],"compare":[124],"our":[128],"several":[132],"other":[133],"recently":[134],"proposed":[135],"architecture.":[137]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":11},{"year":2024,"cited_by_count":5},{"year":2023,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}