{"id":"https://openalex.org/W4304140767","doi":"https://doi.org/10.1109/socc56010.2022.9908096","title":"Monte Cimone: Paving the Road for the First Generation of RISC-V High-Performance Computers","display_name":"Monte Cimone: Paving the Road for the First Generation of RISC-V High-Performance Computers","publication_year":2022,"publication_date":"2022-09-05","ids":{"openalex":"https://openalex.org/W4304140767","doi":"https://doi.org/10.1109/socc56010.2022.9908096"},"language":"en","primary_location":{"id":"doi:10.1109/socc56010.2022.9908096","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc56010.2022.9908096","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE 35th International System-on-Chip Conference (SOCC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://ieeexplore.ieee.org/document/9908096","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5047906923","display_name":"Andrea Bartolini","orcid":"https://orcid.org/0000-0002-1148-2450"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Andrea Bartolini","raw_affiliation_strings":["Università di Bologna,DEI,Bologna,Italy"],"affiliations":[{"raw_affiliation_string":"Università di Bologna,DEI,Bologna,Italy","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064922215","display_name":"Federico Ficarelli","orcid":"https://orcid.org/0000-0003-1447-8278"},"institutions":[{"id":"https://openalex.org/I4210119786","display_name":"Cineca","ror":"https://ror.org/02f013h18","country_code":"IT","type":"other","lineage":["https://openalex.org/I4210119786"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Federico Ficarelli","raw_affiliation_strings":["CINECA SCAI,Casalecchio di Reno,Italy","CINECA SCAI, Casalecchio di Reno, Italy"],"affiliations":[{"raw_affiliation_string":"CINECA SCAI,Casalecchio di Reno,Italy","institution_ids":["https://openalex.org/I4210119786"]},{"raw_affiliation_string":"CINECA SCAI, Casalecchio di Reno, Italy","institution_ids":["https://openalex.org/I4210119786"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015497724","display_name":"Emanuele Parisi","orcid":"https://orcid.org/0000-0001-6607-7367"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Emanuele Parisi","raw_affiliation_strings":["Università di Bologna,DEI,Bologna,Italy"],"affiliations":[{"raw_affiliation_string":"Università di Bologna,DEI,Bologna,Italy","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052021743","display_name":"Francesco Beneventi","orcid":"https://orcid.org/0009-0009-5454-4197"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Francesco Beneventi","raw_affiliation_strings":["Università di Bologna,DEI,Bologna,Italy"],"affiliations":[{"raw_affiliation_string":"Università di Bologna,DEI,Bologna,Italy","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022195134","display_name":"Francesco Barchi","orcid":"https://orcid.org/0000-0001-5155-6883"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Francesco Barchi","raw_affiliation_strings":["Università di Bologna,DEI,Bologna,Italy"],"affiliations":[{"raw_affiliation_string":"Università di Bologna,DEI,Bologna,Italy","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101821783","display_name":"Daniele Gregori","orcid":"https://orcid.org/0000-0002-6137-6453"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Daniele Gregori","raw_affiliation_strings":["E4 Computer Engineering,Scandiano,Italy","E4 Computer Engineering, Scandiano, Italy"],"affiliations":[{"raw_affiliation_string":"E4 Computer Engineering,Scandiano,Italy","institution_ids":[]},{"raw_affiliation_string":"E4 Computer Engineering, Scandiano, Italy","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058573316","display_name":"Fabrizio Magugliani","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Fabrizio Magugliani","raw_affiliation_strings":["E4 Computer Engineering,Scandiano,Italy","E4 Computer Engineering, Scandiano, Italy"],"affiliations":[{"raw_affiliation_string":"E4 Computer Engineering,Scandiano,Italy","institution_ids":[]},{"raw_affiliation_string":"E4 Computer Engineering, Scandiano, Italy","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080494508","display_name":"Marco Cicala","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Marco Cicala","raw_affiliation_strings":["E4 Computer Engineering,Scandiano,Italy","E4 Computer Engineering, Scandiano, Italy"],"affiliations":[{"raw_affiliation_string":"E4 Computer Engineering,Scandiano,Italy","institution_ids":[]},{"raw_affiliation_string":"E4 Computer Engineering, Scandiano, Italy","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073906804","display_name":"Cosimo Gianfreda","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Cosimo Gianfreda","raw_affiliation_strings":["E4 Computer Engineering,Scandiano,Italy","E4 Computer Engineering, Scandiano, Italy"],"affiliations":[{"raw_affiliation_string":"E4 Computer Engineering,Scandiano,Italy","institution_ids":[]},{"raw_affiliation_string":"E4 Computer Engineering, Scandiano, Italy","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002332287","display_name":"Daniele Cesarini","orcid":"https://orcid.org/0000-0003-1294-372X"},"institutions":[{"id":"https://openalex.org/I4210119786","display_name":"Cineca","ror":"https://ror.org/02f013h18","country_code":"IT","type":"other","lineage":["https://openalex.org/I4210119786"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Daniele Cesarini","raw_affiliation_strings":["CINECA SCAI,Casalecchio di Reno,Italy","CINECA SCAI, Casalecchio di Reno, Italy"],"affiliations":[{"raw_affiliation_string":"CINECA SCAI,Casalecchio di Reno,Italy","institution_ids":["https://openalex.org/I4210119786"]},{"raw_affiliation_string":"CINECA SCAI, Casalecchio di Reno, Italy","institution_ids":["https://openalex.org/I4210119786"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031653904","display_name":"Andrea Acquaviva","orcid":"https://orcid.org/0000-0002-7323-759X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Andrea Acquaviva","raw_affiliation_strings":["Università di Bologna,DEI,Bologna,Italy"],"affiliations":[{"raw_affiliation_string":"Università di Bologna,DEI,Bologna,Italy","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043408422","display_name":"Luca Benini","orcid":"https://orcid.org/0000-0001-8068-3806"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Luca Benini","raw_affiliation_strings":["Università di Bologna,DEI,Bologna,Italy"],"affiliations":[{"raw_affiliation_string":"Università di Bologna,DEI,Bologna,Italy","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":12,"corresponding_author_ids":["https://openalex.org/A5047906923"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.2706,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.87828029,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7254689931869507},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.6490259170532227},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5255441069602966},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5086904168128967},{"id":"https://openalex.org/keywords/supercomputer","display_name":"Supercomputer","score":0.4257560968399048},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.4201836585998535},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.41342002153396606},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3788064420223236},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.36055171489715576},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.2879619598388672},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1326945424079895}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7254689931869507},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.6490259170532227},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5255441069602966},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5086904168128967},{"id":"https://openalex.org/C83283714","wikidata":"https://www.wikidata.org/wiki/Q121117","display_name":"Supercomputer","level":2,"score":0.4257560968399048},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.4201836585998535},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.41342002153396606},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3788064420223236},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.36055171489715576},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.2879619598388672},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1326945424079895},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/socc56010.2022.9908096","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc56010.2022.9908096","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE 35th International System-on-Chip Conference (SOCC)","raw_type":"proceedings-article"},{"id":"pmh:oai:cris.unibo.it:11585/905818","is_oa":true,"landing_page_url":"https://ieeexplore.ieee.org/document/9908096","pdf_url":null,"source":{"id":"https://openalex.org/S4306402579","display_name":"Archivio istituzionale della ricerca (Alma Mater Studiorum Universit\u00e0 di Bologna)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4210117483","host_organization_name":"Istituto di Ematologia di Bologna","host_organization_lineage":["https://openalex.org/I4210117483"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":{"id":"pmh:oai:cris.unibo.it:11585/905818","is_oa":true,"landing_page_url":"https://ieeexplore.ieee.org/document/9908096","pdf_url":null,"source":{"id":"https://openalex.org/S4306402579","display_name":"Archivio istituzionale della ricerca (Alma Mater Studiorum Universit\u00e0 di Bologna)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4210117483","host_organization_name":"Istituto di Ematologia di Bologna","host_organization_lineage":["https://openalex.org/I4210117483"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"},"sustainable_development_goals":[{"score":0.6399999856948853,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W2033787161","https://openalex.org/W2750064372","https://openalex.org/W2912012512","https://openalex.org/W2963910387","https://openalex.org/W3016932526","https://openalex.org/W3042944763","https://openalex.org/W3112773671","https://openalex.org/W3123451385","https://openalex.org/W3132840842","https://openalex.org/W3134717858","https://openalex.org/W3159032828"],"related_works":["https://openalex.org/W2384867379","https://openalex.org/W4400094300","https://openalex.org/W2329539859","https://openalex.org/W2227905990","https://openalex.org/W2765823764","https://openalex.org/W3214280620","https://openalex.org/W3191490922","https://openalex.org/W2035206467","https://openalex.org/W2512308948","https://openalex.org/W2068921804"],"abstract_inverted_index":{"The":[0],"new":[1],"open":[2],"and":[3,22,42,58,92,112,135,138],"royalty-free":[4],"RISC-V":[5,20,69,100,117,147],"ISA":[6],"is":[7],"attracting":[8],"interest":[9],"across":[10],"the":[11,86,90,94,121,143,156],"whole":[12],"computing":[13],"continuum,":[14],"from":[15],"microcontrollers":[16],"to":[17,76],"supercomputers.":[18],"High-performance":[19],"processors":[21],"accelerators":[23],"have":[24],"been":[25],"announced,":[26],"but":[27,81],"RISC-V-based":[28],"HPC":[29,106,148],"systems":[30],"will":[31],"need":[32],"a":[33,53,64,98,130],"holistic":[34],"co-design":[35],"effort,":[36,127],"spanning":[37],"memory,":[38],"storage":[39,111],"hierarchy":[40],"interconnects":[41],"full":[43],"software":[44,134],"stack.":[45],"In":[46],"this":[47],"paper,":[48],"we":[49],"describe":[50],"Monte":[51,71],"Cimone,":[52],"fully-operational":[54],"multi-blade":[55],"computer":[56],"prototype":[57],"hardware-software":[59],"test-bed":[60],"based":[61],"on":[62,116],"U740,":[63],"double-precision":[65],"capable":[66,102],"multi-core,":[67],"64-bit":[68],"SoC.":[70],"Cimone":[72],"does":[73],"not":[74,151],"aim":[75],"achieve":[77],"strong":[78],"floating-point":[79],"performance,":[80],"it":[82],"was":[83],"built":[84],"with":[85],"purpose":[87],"of":[88,96,103,123,133,146],"\"priming":[89],"pipe\"":[91],"exploring":[93],"challenges":[95],"integrating":[97],"multi-node":[99],"cluster":[101],"providing":[104],"an":[105],"production":[107],"stack":[108],"including":[109],"interconnect,":[110],"power":[113],"monitoring":[114],"infrastructure":[115],"hardware.":[118],"We":[119],"present":[120],"results":[122],"our":[124],"hardware/software":[125],"integration":[126],"which":[128],"demonstrate":[129],"remarkable":[131],"level":[132],"hardware":[136],"readiness":[137],"maturity":[139],"-":[140],"showing":[141],"that":[142],"first":[144],"generation":[145],"machines":[149],"may":[150],"be":[152],"so":[153],"far":[154],"in":[155],"future.":[157]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":5}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2022-10-11T00:00:00"}