{"id":"https://openalex.org/W3198052318","doi":"https://doi.org/10.1109/socc49529.2020.9524797","title":"Hierarchical Active Voltage Regulation for Heterogeneous TSV 3D-ICs","display_name":"Hierarchical Active Voltage Regulation for Heterogeneous TSV 3D-ICs","publication_year":2020,"publication_date":"2020-09-08","ids":{"openalex":"https://openalex.org/W3198052318","doi":"https://doi.org/10.1109/socc49529.2020.9524797","mag":"3198052318"},"language":"en","primary_location":{"id":"doi:10.1109/socc49529.2020.9524797","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc49529.2020.9524797","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE 33rd International System-on-Chip Conference (SOCC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5066525875","display_name":"Po-Tsang Huang","orcid":"https://orcid.org/0000-0001-8679-2755"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Po-Tsang Huang","raw_affiliation_strings":["National Chiao Tung University, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Chiao Tung University, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112242389","display_name":"Tzung\u2010Han Tsai","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Tzung-Han Tsai","raw_affiliation_strings":["National Chiao Tung University, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Chiao Tung University, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077237693","display_name":"Po-Jen Yang","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Po-Jen Yang","raw_affiliation_strings":["National Chiao Tung University, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Chiao Tung University, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111568152","display_name":"Wei Hwang","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Wei Hwang","raw_affiliation_strings":["National Chiao Tung University, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Chiao Tung University, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5021615416","display_name":"Hung-Ming Chen","orcid":"https://orcid.org/0000-0001-8173-3131"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Hung-Ming Chen","raw_affiliation_strings":["National Chiao Tung University, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Chiao Tung University, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I148366613"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"242","last_page":"247"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9941999912261963,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9940000176429749,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/decoupling","display_name":"Decoupling (probability)","score":0.7416286468505859},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.6161872744560242},{"id":"https://openalex.org/keywords/system-in-package","display_name":"System in package","score":0.5944517254829407},{"id":"https://openalex.org/keywords/power-integrity","display_name":"Power integrity","score":0.5738640427589417},{"id":"https://openalex.org/keywords/decoupling-capacitor","display_name":"Decoupling capacitor","score":0.5594515204429626},{"id":"https://openalex.org/keywords/voltage-regulator","display_name":"Voltage regulator","score":0.5270025134086609},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5104326605796814},{"id":"https://openalex.org/keywords/three-dimensional-integrated-circuit","display_name":"Three-dimensional integrated circuit","score":0.503896176815033},{"id":"https://openalex.org/keywords/through-silicon-via","display_name":"Through-silicon via","score":0.4941261112689972},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.4723297953605652},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.456750750541687},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.41205713152885437},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.39011162519454956},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3753940463066101},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.3295649290084839},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.31878477334976196},{"id":"https://openalex.org/keywords/signal-integrity","display_name":"Signal integrity","score":0.17242494225502014},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.152822345495224},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.10557299852371216}],"concepts":[{"id":"https://openalex.org/C205606062","wikidata":"https://www.wikidata.org/wiki/Q5249645","display_name":"Decoupling (probability)","level":2,"score":0.7416286468505859},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.6161872744560242},{"id":"https://openalex.org/C146667757","wikidata":"https://www.wikidata.org/wiki/Q1457198","display_name":"System in package","level":3,"score":0.5944517254829407},{"id":"https://openalex.org/C2777561913","wikidata":"https://www.wikidata.org/wiki/Q19599527","display_name":"Power integrity","level":4,"score":0.5738640427589417},{"id":"https://openalex.org/C35196352","wikidata":"https://www.wikidata.org/wiki/Q1532649","display_name":"Decoupling capacitor","level":4,"score":0.5594515204429626},{"id":"https://openalex.org/C110706871","wikidata":"https://www.wikidata.org/wiki/Q851210","display_name":"Voltage regulator","level":3,"score":0.5270025134086609},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5104326605796814},{"id":"https://openalex.org/C59088047","wikidata":"https://www.wikidata.org/wiki/Q229370","display_name":"Three-dimensional integrated circuit","level":3,"score":0.503896176815033},{"id":"https://openalex.org/C45632049","wikidata":"https://www.wikidata.org/wiki/Q1578120","display_name":"Through-silicon via","level":3,"score":0.4941261112689972},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.4723297953605652},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.456750750541687},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.41205713152885437},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.39011162519454956},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3753940463066101},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.3295649290084839},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.31878477334976196},{"id":"https://openalex.org/C44938667","wikidata":"https://www.wikidata.org/wiki/Q4503810","display_name":"Signal integrity","level":3,"score":0.17242494225502014},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.152822345495224},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.10557299852371216},{"id":"https://openalex.org/C133731056","wikidata":"https://www.wikidata.org/wiki/Q4917288","display_name":"Control engineering","level":1,"score":0.0},{"id":"https://openalex.org/C160671074","wikidata":"https://www.wikidata.org/wiki/Q267131","display_name":"Wafer","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/socc49529.2020.9524797","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc49529.2020.9524797","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE 33rd International System-on-Chip Conference (SOCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8500000238418579}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1971997205","https://openalex.org/W1972885692","https://openalex.org/W1974185940","https://openalex.org/W1975691531","https://openalex.org/W1983445519","https://openalex.org/W2008418455","https://openalex.org/W2026076629","https://openalex.org/W2026552993","https://openalex.org/W2043443161","https://openalex.org/W2069756028","https://openalex.org/W2103972191","https://openalex.org/W2112890389","https://openalex.org/W2161803106","https://openalex.org/W2791562781","https://openalex.org/W2965769762","https://openalex.org/W2970073801"],"related_works":["https://openalex.org/W2126420455","https://openalex.org/W2062396011","https://openalex.org/W2163041395","https://openalex.org/W1998607656","https://openalex.org/W2146176401","https://openalex.org/W2010609468","https://openalex.org/W2809795632","https://openalex.org/W2543304869","https://openalex.org/W2002219888","https://openalex.org/W2114013244"],"abstract_inverted_index":{"Among":[0],"different":[1],"system-in-package":[2],"(SiP)":[3],"technologies,":[4],"through-silicon-via":[5],"(TSV)":[6],"3D-IC":[7],"is":[8,62,119],"the":[9,12,21,31,73,78,83,106,124,142,163],"key":[10],"to":[11,20,42,64,122,177],"success":[13],"of":[14,155],"future":[15],"heterogeneous":[16,26,69,157],"SiP":[17],"integration":[18,160],"due":[19],"high":[22],"interconnect":[23],"density.":[24],"In":[25,50],"TSV":[27,70,132,158],"3D":[28,54,159],"integration,":[29],"however,":[30],"increasing":[32],"current":[33],"density":[34],"through":[35],"both":[36,129],"package":[37],"and":[38,82,100,109,131,152],"TSVs":[39],"would":[40],"lead":[41],"a":[43,53,114,156],"large":[44],"simultaneous":[45],"switching":[46],"noise":[47,116,164],"(SSN)":[48],"potentially.":[49],"this":[51],"paper,":[52],"power":[55,80,85,125,148,167,182],"network":[56,81],"with":[57,179],"hierarchical":[58,74],"active":[59,75,95],"voltage":[60,76,91],"regulation":[61],"proposed":[63],"reduce":[65],"dynamic":[66],"noises":[67],"for":[68,140],"3D-ICs.":[71],"For":[72],"regulation,":[77],"global":[79,107],"local":[84,110],"networks":[86],"are":[87,103,173],"decoupled":[88],"by":[89,127,175],"fully-integrated":[90],"regulators":[92],"(FIVRs).":[93],"Furthermore,":[94],"switched":[96],"decoupling":[97],"capacitors":[98],"(DECAPs)":[99],"distributed":[101],"FIVRs":[102],"adopted":[104],"as":[105],"regulator":[108],"regulators,":[111],"respectively.":[112],"Additionally,":[113],"substrate":[115,130],"suppression":[117],"technique":[118],"also":[120],"presented":[121],"enhance":[123],"integrity":[126],"reducing":[128,141],"coupling":[133],"noises.":[134],"These":[135],"techniques":[136],"achieve":[137],"not":[138],"only":[139,180],"required":[143],"DECAPs":[144],"but":[145],"providing":[146],"flexible":[147],"sources.":[149],"The":[150],"modeling":[151],"simulation":[153],"results":[154],"demonstrate":[161],"that":[162],"reduction":[165],"on":[166],"supply":[168],"pairs":[169],"(VDD":[170],"&":[171],"GND)":[172],"suppressed":[174],"up":[176],"71.10%":[178],"1.11%":[181],"overhead.":[183]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}