{"id":"https://openalex.org/W3198687484","doi":"https://doi.org/10.1109/socc49529.2020.9524748","title":"Energy-Efficient Adiabatic Circuits Using Transistor-Level Monolithic 3D Integration","display_name":"Energy-Efficient Adiabatic Circuits Using Transistor-Level Monolithic 3D Integration","publication_year":2020,"publication_date":"2020-09-08","ids":{"openalex":"https://openalex.org/W3198687484","doi":"https://doi.org/10.1109/socc49529.2020.9524748","mag":"3198687484"},"language":"en","primary_location":{"id":"doi:10.1109/socc49529.2020.9524748","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc49529.2020.9524748","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE 33rd International System-on-Chip Conference (SOCC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039709669","display_name":"Ivan Miketic","orcid":"https://orcid.org/0000-0003-4935-2640"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Ivan Miketic","raw_affiliation_strings":["New York"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"New York","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5061262597","display_name":"Emre Salman","orcid":"https://orcid.org/0000-0001-6538-6803"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Emre Salman","raw_affiliation_strings":["New York"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"New York","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.30889388,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"191","last_page":"194"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10083","display_name":"Graphene research and applications","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2505","display_name":"Materials Chemistry"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adiabatic-circuit","display_name":"Adiabatic circuit","score":0.9197515249252319},{"id":"https://openalex.org/keywords/adiabatic-process","display_name":"Adiabatic process","score":0.7181882858276367},{"id":"https://openalex.org/keywords/pmos-logic","display_name":"PMOS logic","score":0.6990652680397034},{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.6493704319000244},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5901643633842468},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.555549681186676},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5125589370727539},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.4912664294242859},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.47856929898262024},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4369502663612366},{"id":"https://openalex.org/keywords/power\u2013delay-product","display_name":"Power\u2013delay product","score":0.4268917441368103},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.42566725611686707},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3492008447647095},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.34369659423828125},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.3419380187988281},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.2546161115169525},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.193804532289505},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.17514273524284363},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.16896310448646545},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.059867024421691895}],"concepts":[{"id":"https://openalex.org/C87606752","wikidata":"https://www.wikidata.org/wiki/Q4682637","display_name":"Adiabatic circuit","level":5,"score":0.9197515249252319},{"id":"https://openalex.org/C109663097","wikidata":"https://www.wikidata.org/wiki/Q182453","display_name":"Adiabatic process","level":2,"score":0.7181882858276367},{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.6990652680397034},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.6493704319000244},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5901643633842468},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.555549681186676},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5125589370727539},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.4912664294242859},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.47856929898262024},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4369502663612366},{"id":"https://openalex.org/C2776391166","wikidata":"https://www.wikidata.org/wiki/Q7236873","display_name":"Power\u2013delay product","level":4,"score":0.4268917441368103},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.42566725611686707},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3492008447647095},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.34369659423828125},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.3419380187988281},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.2546161115169525},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.193804532289505},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.17514273524284363},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.16896310448646545},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.059867024421691895},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/socc49529.2020.9524748","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc49529.2020.9524748","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE 33rd International System-on-Chip Conference (SOCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W759502517","https://openalex.org/W1604156871","https://openalex.org/W1751600266","https://openalex.org/W1964678809","https://openalex.org/W1974392394","https://openalex.org/W1995669179","https://openalex.org/W2002806561","https://openalex.org/W2062001633","https://openalex.org/W2122984966","https://openalex.org/W2132686275","https://openalex.org/W2133038247","https://openalex.org/W2510950183","https://openalex.org/W2516025887","https://openalex.org/W2525903134","https://openalex.org/W2577043759","https://openalex.org/W2597863352","https://openalex.org/W2757604236","https://openalex.org/W2768265037","https://openalex.org/W2775246436","https://openalex.org/W2799886512","https://openalex.org/W2895774650","https://openalex.org/W2919062775","https://openalex.org/W2946670511","https://openalex.org/W2971381503","https://openalex.org/W6637775719","https://openalex.org/W6666348544"],"related_works":["https://openalex.org/W2580743037","https://openalex.org/W2965791759","https://openalex.org/W2418067545","https://openalex.org/W2988242922","https://openalex.org/W4210368030","https://openalex.org/W2042750210","https://openalex.org/W2096561527","https://openalex.org/W2765372174","https://openalex.org/W1521268501","https://openalex.org/W2156660390"],"abstract_inverted_index":{"Charge-recycling":[0],"adiabatic":[1,22,37,62,86,98,111,149],"circuits":[2,23,63,99,150],"are":[3,100,129],"recently":[4],"receiving":[5],"increased":[6],"attention":[7],"due":[8,45],"to":[9,46,109,121,131,139,147],"both":[10],"high":[11],"energy-efficiency":[12],"and":[13,49],"higher":[14,41,72],"resistance":[15],"against":[16],"side-channel":[17],"attacks.":[18],"These":[19],"characteristics":[20],"make":[21],"a":[24,152],"promising":[25],"technique":[26],"for":[27],"Internet-of-things":[28],"based":[29],"applications.":[30],"One":[31],"of":[32,36],"the":[33,40,77,123],"important":[34],"limitations":[35],"logic":[38],"is":[39,70,107,119],"intra-cell":[42],"interconnect":[43,73,135],"capacitance":[44,60,74],"differential":[47],"outputs":[48],"cross-coupled":[50],"pMOS":[51],"transistors.":[52],"Since":[53],"energy":[54],"consumption":[55],"has":[56],"quadratic":[57],"dependence":[58,69],"on":[59],"in":[61,89,142,151],"(unlike":[64],"conventional":[65],"static":[66],"CMOS":[67],"where":[68,102],"linear),":[71],"significantly":[75,132],"degrades":[76],"overall":[78],"power":[79],"savings":[80],"that":[81],"can":[82],"be":[83],"achieved":[84],"by":[85],"logic,":[87],"particularly":[88],"nanoscale":[90],"technologies.":[91],"In":[92],"this":[93],"paper,":[94],"monolithic":[95,104],"3D":[96,105],"integrated":[97],"introduced":[101],"transistor-level":[103],"technology":[106,155],"used":[108,120],"implement":[110],"gates.":[112],"A":[113],"45":[114,153],"nm":[115,154],"two-tier":[116],"Mono3D":[117],"PDK":[118],"demonstrate":[122],"proposed":[124],"approach.":[125],"Monolithic":[126],"inter-tier":[127],"vias":[128],"leveraged":[130],"reduce":[133],"parasitic":[134],"capacitance,":[136],"achieving":[137],"up":[138],"47%":[140],"reduction":[141],"power-delay":[143],"product":[144],"as":[145],"compared":[146],"2D":[148],"node.":[156]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}