{"id":"https://openalex.org/W2913678354","doi":"https://doi.org/10.1109/socc.2018.8618501","title":"Taxonomy of Spatial Parallelism on FPGAs for Massively Parallel Applications","display_name":"Taxonomy of Spatial Parallelism on FPGAs for Massively Parallel Applications","publication_year":2018,"publication_date":"2018-09-01","ids":{"openalex":"https://openalex.org/W2913678354","doi":"https://doi.org/10.1109/socc.2018.8618501","mag":"2913678354"},"language":"en","primary_location":{"id":"doi:10.1109/socc.2018.8618501","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2018.8618501","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 31st IEEE International System-on-Chip Conference (SOCC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5015296337","display_name":"Arnab A Purkayastha","orcid":"https://orcid.org/0000-0002-2906-3123"},"institutions":[{"id":"https://openalex.org/I102149020","display_name":"University of North Carolina at Charlotte","ror":"https://ror.org/04dawnj30","country_code":"US","type":"education","lineage":["https://openalex.org/I102149020"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Arnab A Purkayastha","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of North Carolina Charlotte (UNC Charlotte), USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of North Carolina Charlotte (UNC Charlotte), USA","institution_ids":["https://openalex.org/I102149020"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056696316","display_name":"Suhas Ashok Shiddhibhavi","orcid":null},"institutions":[{"id":"https://openalex.org/I102149020","display_name":"University of North Carolina at Charlotte","ror":"https://ror.org/04dawnj30","country_code":"US","type":"education","lineage":["https://openalex.org/I102149020"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Suhas Ashok Shiddhibhavi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of North Carolina Charlotte (UNC Charlotte), USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of North Carolina Charlotte (UNC Charlotte), USA","institution_ids":["https://openalex.org/I102149020"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5063615699","display_name":"Hamed Tabkhi","orcid":"https://orcid.org/0000-0001-5420-1121"},"institutions":[{"id":"https://openalex.org/I102149020","display_name":"University of North Carolina at Charlotte","ror":"https://ror.org/04dawnj30","country_code":"US","type":"education","lineage":["https://openalex.org/I102149020"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hamed Tabkhi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of North Carolina Charlotte (UNC Charlotte), USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of North Carolina Charlotte (UNC Charlotte), USA","institution_ids":["https://openalex.org/I102149020"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I102149020"],"apc_list":null,"apc_paid":null,"fwci":1.1015,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.76412891,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"55","last_page":"60"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8977972269058228},{"id":"https://openalex.org/keywords/stratix","display_name":"Stratix","score":0.7801111936569214},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7427865266799927},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6605167388916016},{"id":"https://openalex.org/keywords/massively-parallel","display_name":"Massively parallel","score":0.610744833946228},{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.5297965407371521},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4553946852684021},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.29217642545700073}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8977972269058228},{"id":"https://openalex.org/C2776277307","wikidata":"https://www.wikidata.org/wiki/Q22074755","display_name":"Stratix","level":3,"score":0.7801111936569214},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7427865266799927},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6605167388916016},{"id":"https://openalex.org/C190475519","wikidata":"https://www.wikidata.org/wiki/Q544384","display_name":"Massively parallel","level":2,"score":0.610744833946228},{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.5297965407371521},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4553946852684021},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.29217642545700073}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/socc.2018.8618501","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2018.8618501","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 31st IEEE International System-on-Chip Conference (SOCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6399999856948853,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1671261784","https://openalex.org/W1989773959","https://openalex.org/W2013322341","https://openalex.org/W2038662769","https://openalex.org/W2043957526","https://openalex.org/W2066860750","https://openalex.org/W2080592089","https://openalex.org/W2082571554","https://openalex.org/W2094969361","https://openalex.org/W2119156857","https://openalex.org/W2119443090","https://openalex.org/W2122106801","https://openalex.org/W2271934614","https://openalex.org/W2276395270","https://openalex.org/W2343480761","https://openalex.org/W2472500612","https://openalex.org/W2480421838","https://openalex.org/W2554260456","https://openalex.org/W2585164556","https://openalex.org/W4252821989","https://openalex.org/W6694197373"],"related_works":["https://openalex.org/W1509155667","https://openalex.org/W2518118925","https://openalex.org/W3208151864","https://openalex.org/W1580556151","https://openalex.org/W2144463068","https://openalex.org/W2106942255","https://openalex.org/W2185915791","https://openalex.org/W1564576805","https://openalex.org/W2120705320","https://openalex.org/W2129565950"],"abstract_inverted_index":{"OpenCL":[0,29,48,69,98,125,144,152,181,236],"for":[1,9,30,138,172,192],"FPGAs":[2,31,73],"has":[3,51],"emerged":[4],"as":[5,40,200],"an":[6],"attractive":[7],"solution":[8],"realizing":[10],"massively":[11],"parallel":[12],"compute-intensive":[13],"applications.":[14],"It":[15],"offers":[16],"a":[17,85,135,161,257],"customizable":[18],"application-specific":[19],"datapath":[20],"while":[21],"abstracting":[22],"away":[23],"hardware":[24],"development":[25],"complexity.":[26],"Research":[27],"on":[28,72,119,127,167,190],"is":[32],"at":[33],"early":[34],"stages":[35],"and":[36,60,74,91,106,114,121,186,195,209,253],"many":[37],"aspects":[38],"such":[39],"the":[41,66,76,80,93,101,108,201,207,249],"spatial":[42,94,140,242],"parallelism":[43,77,95,141,243],"matching":[44],"with":[45,222],"respect":[46],"to":[47,64,79,88,100,145,247],"execution":[49,126,224],"semantic":[50],"not":[52],"been":[53],"explored":[54],"in":[55,149,256],"detail.":[56],"An":[57],"in-depth":[58],"understanding":[59],"formalization":[61],"are":[62],"required":[63],"enhance":[65],"efficiency":[67,123,159,211],"of":[68,110,124,175],"written":[70],"codes":[71,153,182],"improve":[75],"potentials":[78],"fullest.":[81],"This":[82,147],"paper":[83,104,133],"presents":[84],"comprehensive":[86],"study":[87],"identify,":[89],"analyze":[90],"categorize":[92],"when":[96,142],"mapping":[97,143],"kernels":[99],"FPGAs.":[102,128,146],"The":[103],"studies":[105],"explores":[107],"impact":[109],"Data-Path":[111],"(DP)":[112],"replication":[113,118],"Compute":[115],"Unit":[116],"(CU)":[117],"performance":[120,188,208,232],"power":[122,210],"To":[129],"this":[130,132],"end,":[131],"proposes":[134],"generic":[136],"taxonomy":[137],"classifying":[139],"results":[148,166,218],"developing":[150],"FPGA-aware":[151,180],"that":[154,179,220,239],"can":[155,226,240],"achieve":[156,183],"much":[157,230],"higher":[158,231,258],"over":[160,198],"baseline":[162,202],"implementation.":[163,203],"Our":[164,217],"experimental":[165],"Altera":[168],"Stratix-V":[169],"FPGA":[170],"device":[171],"eight":[173],"applications":[174],"Rodinia":[176],"benchmarks":[177,221],"demonstrate":[178,219],"3.4X,":[184],"2.2X":[185],"2.6X":[187],"improvement":[189],"average":[191],"SCU-MDP,":[193],"MCU-SDP,":[194],"MCU-MDP":[196],"versions":[197],"SCU-SDP":[199],"Furthermore,":[204,235],"we":[205],"compare":[206],"against":[212],"AMD":[213],"FirePro":[214],"W7100":[215],"GPU.":[216],"regular":[223],"patterns":[225],"outperform":[227],"GPUs,":[228],"achieving":[229],"per":[233],"watt.":[234],"source-code":[237],"decisions":[238],"exploit":[241],"will":[244],"be":[245],"able":[246],"hide":[248],"memory":[250],"access":[251],"latency":[252],"thus":[254],"result":[255],"speedup.":[259]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":2}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}