{"id":"https://openalex.org/W2290734434","doi":"https://doi.org/10.1109/socc.2015.7406948","title":"Symmetric write operation for 1T-1MTJ STT-RAM cells using negative bitline technique","display_name":"Symmetric write operation for 1T-1MTJ STT-RAM cells using negative bitline technique","publication_year":2015,"publication_date":"2015-09-01","ids":{"openalex":"https://openalex.org/W2290734434","doi":"https://doi.org/10.1109/socc.2015.7406948","mag":"2290734434"},"language":"en","primary_location":{"id":"doi:10.1109/socc.2015.7406948","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2015.7406948","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 28th IEEE International System-on-Chip Conference (SOCC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5050458474","display_name":"Hooman Farkhani","orcid":"https://orcid.org/0000-0002-8632-2240"},"institutions":[{"id":"https://openalex.org/I86958956","display_name":"Ferdowsi University of Mashhad","ror":"https://ror.org/00g6ka752","country_code":"IR","type":"education","lineage":["https://openalex.org/I86958956"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Hooman Farkhani","raw_affiliation_strings":["Department of Electrical Engineering, Ferdowsi University of Mashhad, Mashhad, Iran"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Ferdowsi University of Mashhad, Mashhad, Iran","institution_ids":["https://openalex.org/I86958956"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063360720","display_name":"Ali Peiravi","orcid":"https://orcid.org/0000-0003-4379-523X"},"institutions":[{"id":"https://openalex.org/I86958956","display_name":"Ferdowsi University of Mashhad","ror":"https://ror.org/00g6ka752","country_code":"IR","type":"education","lineage":["https://openalex.org/I86958956"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Ali Peiravi","raw_affiliation_strings":["Department of Electrical Engineering, Ferdowsi University of Mashhad, Mashhad, Iran"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Ferdowsi University of Mashhad, Mashhad, Iran","institution_ids":["https://openalex.org/I86958956"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100862700","display_name":"Jens Kargaard Madsen","orcid":null},"institutions":[{"id":"https://openalex.org/I204337017","display_name":"Aarhus University","ror":"https://ror.org/01aj84f44","country_code":"DK","type":"education","lineage":["https://openalex.org/I204337017"]}],"countries":["DK"],"is_corresponding":false,"raw_author_name":"Jens Kargaard Madsen","raw_affiliation_strings":["Department of Engineering, Aarhus University, Aarhus, Denmark"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Engineering, Aarhus University, Aarhus, Denmark","institution_ids":["https://openalex.org/I204337017"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043716992","display_name":"Farshad Moradi","orcid":"https://orcid.org/0000-0001-7077-8545"},"institutions":[{"id":"https://openalex.org/I204337017","display_name":"Aarhus University","ror":"https://ror.org/01aj84f44","country_code":"DK","type":"education","lineage":["https://openalex.org/I204337017"]}],"countries":["DK"],"is_corresponding":false,"raw_author_name":"Farshad Moradi","raw_affiliation_strings":["Department of Engineering, Aarhus University, Aarhus, Denmark"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Engineering, Aarhus University, Aarhus, Denmark","institution_ids":["https://openalex.org/I204337017"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"18","issue":null,"first_page":"215","last_page":"220"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7008873820304871},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.632394552230835},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6058521270751953},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5809701681137085},{"id":"https://openalex.org/keywords/energy","display_name":"Energy (signal processing)","score":0.4965525269508362},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4528175890445709},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.4146474599838257},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4059644937515259},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.38963907957077026},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3377169966697693},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1499183177947998},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.09348809719085693},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.06805479526519775}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7008873820304871},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.632394552230835},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6058521270751953},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5809701681137085},{"id":"https://openalex.org/C186370098","wikidata":"https://www.wikidata.org/wiki/Q442787","display_name":"Energy (signal processing)","level":2,"score":0.4965525269508362},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4528175890445709},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.4146474599838257},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4059644937515259},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.38963907957077026},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3377169966697693},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1499183177947998},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.09348809719085693},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.06805479526519775},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/socc.2015.7406948","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2015.7406948","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 28th IEEE International System-on-Chip Conference (SOCC)","raw_type":"proceedings-article"},{"id":"pmh:oai:pure.atira.dk:publications/5fb06130-ba33-4c90-9ebc-d5b8aeb80514","is_oa":false,"landing_page_url":"https://pure.au.dk/portal/en/publications/5fb06130-ba33-4c90-9ebc-d5b8aeb80514","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Farkhani, H, Peiravi, A, Madsen, J K & Moradi, F 2015, Symmetric Write Operation for 1T-1MTJ STT-RAM Cells Using Negative Bitline Technique. in Proceedings of the 28th IEEE International System on Chip Conference (SOCC). vol. 2015, IEEE, pp. 215-220, IEEE International System-on-Chip Conference , Beijing , China, 09/09/2015. < http://ieeexplore.ieee.org.ez.statsbiblioteket.dk:2048/xpl/articleDetails.jsp?arnumber=7406948&newsearch=true&queryText=10.1109%2FSOCC.2015.7406948%20 >","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.9100000262260437,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1967547265","https://openalex.org/W1979792075","https://openalex.org/W1980459528","https://openalex.org/W1983562124","https://openalex.org/W1985841039","https://openalex.org/W2000777532","https://openalex.org/W2008362573","https://openalex.org/W2019071604","https://openalex.org/W2035925590","https://openalex.org/W2096406360","https://openalex.org/W2126809390","https://openalex.org/W2151901948","https://openalex.org/W2188761345","https://openalex.org/W4285719527","https://openalex.org/W6687026183"],"related_works":["https://openalex.org/W3014521742","https://openalex.org/W2617868873","https://openalex.org/W3204141294","https://openalex.org/W4386230336","https://openalex.org/W4306968100","https://openalex.org/W2464627195","https://openalex.org/W2171986175","https://openalex.org/W2089791793","https://openalex.org/W2038858740","https://openalex.org/W1491218245"],"abstract_inverted_index":{"In":[0,77],"this":[1],"paper,":[2],"a":[3,20,29],"new":[4],"write":[5,13,22,36,61,69,81,101,123],"assist":[6,62,82],"technique":[7,41,63,83],"is":[8,25,42,111],"proposed":[9,40,48,60,80],"to":[10,32,72,85],"improve":[11],"the":[12,33,45,59,73,79,91,105,109],"characteristics":[14],"of":[15],"1T-1MTJ":[16],"STT-RAM":[17],"bitcell":[18],"through":[19],"symmetric":[21],"operation.":[23,38],"This":[24],"done":[26],"by":[27,113],"applying":[28],"negative":[30],"voltage":[31,107],"bitline":[34],"during":[35],"`1'":[37],"The":[39,50],"compared":[43,71,95,117],"with":[44,96,118],"best":[46],"previously":[47],"techniques.":[49],"simulation":[51],"results":[52,64],"using":[53],"65nm":[54],"CMOS":[55],"technology":[56],"show":[57],"that":[58],"in":[65,68,90],"19%":[66],"improvement":[67],"energy":[70],"boosted":[74,97,119],"wordline":[75,98,120],"technique.":[76],"addition,":[78],"leads":[84],"12%":[86],"and":[87,99,115,121],"48%":[88],"reduction":[89],"access":[92],"transistor":[93],"width":[94],"balanced":[100,122],"techniques,":[102,124],"respectively.":[103,125],"Furthermore,":[104],"maximum":[106],"across":[108],"MTJ":[110],"reduced":[112],"20%":[114],"6%":[116]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":3}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}