{"id":"https://openalex.org/W1973433677","doi":"https://doi.org/10.1109/socc.2013.6749699","title":"Implementation and performance analysis of variable latency adders","display_name":"Implementation and performance analysis of variable latency adders","publication_year":2013,"publication_date":"2013-09-01","ids":{"openalex":"https://openalex.org/W1973433677","doi":"https://doi.org/10.1109/socc.2013.6749699","mag":"1973433677"},"language":"en","primary_location":{"id":"doi:10.1109/socc.2013.6749699","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2013.6749699","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International SOC Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5052498356","display_name":"Ali Sayyed","orcid":"https://orcid.org/0000-0001-8373-3135"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Ali Sayyed","raw_affiliation_strings":["Electronics Department, Politechnico di Torino, ITALY","Electron. Dept., Politechnico di Torino, Turin, Italy"],"affiliations":[{"raw_affiliation_string":"Electronics Department, Politechnico di Torino, ITALY","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Electron. Dept., Politechnico di Torino, Turin, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050365912","display_name":"Luciano Lavagno","orcid":"https://orcid.org/0000-0002-9762-6522"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luciano Lavagno","raw_affiliation_strings":["Electronics Department, Politechnico di Torino, ITALY","Electron. Dept., Politechnico di Torino, Turin, Italy"],"affiliations":[{"raw_affiliation_string":"Electronics Department, Politechnico di Torino, ITALY","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Electron. Dept., Politechnico di Torino, Turin, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049442812","display_name":"Shah Khalid","orcid":"https://orcid.org/0000-0002-1641-1125"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Shah Khalid","raw_affiliation_strings":["Electronics Department, Politechnico di Torino, ITALY","Electron. Dept., Politechnico di Torino, Turin, Italy"],"affiliations":[{"raw_affiliation_string":"Electronics Department, Politechnico di Torino, ITALY","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Electron. Dept., Politechnico di Torino, Turin, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109601653","display_name":"Najeeb ur Rahman","orcid":null},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Najeeb Ur Rahman","raw_affiliation_strings":["Electronics Department, Politechnico di Torino, ITALY","Electron. Dept., Politechnico di Torino, Turin, Italy"],"affiliations":[{"raw_affiliation_string":"Electronics Department, Politechnico di Torino, ITALY","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Electron. Dept., Politechnico di Torino, Turin, Italy","institution_ids":["https://openalex.org/I177477856"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5052498356"],"corresponding_institution_ids":["https://openalex.org/I177477856"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.05069011,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"267","last_page":"272"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.8029567003250122},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7980188131332397},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.7808054685592651},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5650196075439453},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.48188215494155884},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.4702046513557434},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.33135318756103516},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.11588814854621887},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11166629195213318},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11016151309013367}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.8029567003250122},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7980188131332397},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.7808054685592651},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5650196075439453},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.48188215494155884},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.4702046513557434},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.33135318756103516},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.11588814854621887},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11166629195213318},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11016151309013367}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/socc.2013.6749699","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2013.6749699","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International SOC Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.4099999964237213}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W101515164","https://openalex.org/W1578458555","https://openalex.org/W1871093416","https://openalex.org/W2021330840","https://openalex.org/W2021609618","https://openalex.org/W2097418516","https://openalex.org/W2145277443","https://openalex.org/W2145654204","https://openalex.org/W2147847555","https://openalex.org/W2166853570","https://openalex.org/W2167383670","https://openalex.org/W2168543008","https://openalex.org/W4231905827","https://openalex.org/W4256653526","https://openalex.org/W6639291323"],"related_works":["https://openalex.org/W4390550886","https://openalex.org/W3217463396","https://openalex.org/W2790557758","https://openalex.org/W2516396101","https://openalex.org/W3204929712","https://openalex.org/W4295102875","https://openalex.org/W2300671402","https://openalex.org/W1993041309","https://openalex.org/W2013839957","https://openalex.org/W3196607417"],"abstract_inverted_index":{"Asynchronous":[0],"circuit":[1],"design":[2,122],"is":[3,36,86,151,173],"enjoying":[4],"resurgence":[5],"in":[6,107,159],"the":[7,41,56,68,75,89,94,104,113,121,155,167],"digital":[8],"world,":[9],"with":[10],"many":[11,63],"recent":[12],"technical":[13],"and":[14,17,91,115,190,205,216,222],"practical":[15],"advancements":[16],"improvements.":[18,149],"The":[19,29,137],"advantages":[20,96],"of":[21,93,117,123,161],"asynchronous":[22,72,126],"systems":[23,26],"over":[24],"synchronous":[25,79],"are":[27,187,209,218],"promising.":[28],"opportunity":[30],"to":[31,77,88],"implement":[32],"high":[33,124],"performance":[34,95,125,148,156],"data-paths":[35,73],"very":[37],"attractive":[38],"by":[39,101],"exploiting":[40],"fact":[42],"that":[43,97,143,154],"most":[44],"data-path":[45],"modules":[46],"have":[47,74,196],"data":[48,141],"dependent":[49],"delays.":[50],"In":[51],"other":[52],"words":[53],"they":[54],"compute":[55],"result":[57],"faster":[58,175,192,225],"than":[59,176],"worst":[60],"case":[61,70,160],"under":[62],"input":[64],"combinations.":[65],"Therefore":[66],"making":[67],"common":[69],"fast,":[71],"potential":[76],"outperform":[78],"designs":[80],"on":[81,131,139],"average":[82],"inputs.":[83],"This":[84],"paper":[85],"devoted":[87],"implementation":[90,114],"analysis":[92,116,138],"can":[98],"be":[99],"achieved":[100],"dynamically":[102],"selecting":[103],"matched":[105],"delay":[106],"a":[108,118,177],"bundled-data":[109],"setting.":[110],"It":[111,150],"presents":[112],"method":[119],"for":[120],"adders":[127,208],"called":[128],"\u201cspeculative":[129],"completion\u201d":[130],"six":[132],"different":[133],"32":[134,188],"bit":[135],"adders.":[136],"random":[140],"indicates":[142],"speculative":[144,171,182],"completion":[145,183],"yields":[146],"significant":[147],"also":[152],"noticed":[153],"improves":[157],"further":[158],"small":[162],"number":[163],"additions.":[164],"On":[165],"average,":[166],"32-bit":[168,178],"Brent":[169,179],"Kung":[170,180],"adder":[172],"19.4%":[174],"without":[181],"if":[184,193],"both":[185,194],"inputs":[186,195],"bits":[189],"24.8%":[191],"only":[197],"16":[198,219],"non":[199],"zero":[200],"bits.":[201],"Similarly":[202],"Kogge":[203],"Stone":[204],"Sparse":[206],"Tree":[207],"24.2%":[210],"faster;":[211],"Ladner":[212],"Fischer,":[213],"Han":[214],"Carlson":[215],"Sklansky":[217],"%,":[220],"22.75%":[221],"18.5":[223],"%":[224],"respectively.":[226]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}