{"id":"https://openalex.org/W2059448714","doi":"https://doi.org/10.1109/socc.2013.6749665","title":"Adaptive driver with automatic sense and calibration in CMOS 40LP","display_name":"Adaptive driver with automatic sense and calibration in CMOS 40LP","publication_year":2013,"publication_date":"2013-09-01","ids":{"openalex":"https://openalex.org/W2059448714","doi":"https://doi.org/10.1109/socc.2013.6749665","mag":"2059448714"},"language":"en","primary_location":{"id":"doi:10.1109/socc.2013.6749665","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2013.6749665","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International SOC Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5046712322","display_name":"Sushrant Monga","orcid":null},"institutions":[{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Sushrant Monga","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology Delhi, New Delhi","Dept. of Electr. Eng., Indian Inst. of Technol. - Delhi, New Delhi, India"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology Delhi, New Delhi","institution_ids":["https://openalex.org/I68891433"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Indian Inst. of Technol. - Delhi, New Delhi, India","institution_ids":["https://openalex.org/I68891433"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5046712322"],"corresponding_institution_ids":["https://openalex.org/I68891433"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.11560812,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"83","last_page":"86"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6803261041641235},{"id":"https://openalex.org/keywords/electrical-impedance","display_name":"Electrical impedance","score":0.6405574679374695},{"id":"https://openalex.org/keywords/ohm","display_name":"Ohm","score":0.5936216711997986},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.5889685153961182},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.5441043376922607},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5407713651657104},{"id":"https://openalex.org/keywords/output-impedance","display_name":"Output impedance","score":0.5338925719261169},{"id":"https://openalex.org/keywords/calibration","display_name":"Calibration","score":0.5090298652648926},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.48709607124328613},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4793858528137207},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4720797538757324},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4644268751144409},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.43973395228385925},{"id":"https://openalex.org/keywords/impedance-matching","display_name":"Impedance matching","score":0.430814653635025},{"id":"https://openalex.org/keywords/line","display_name":"Line (geometry)","score":0.4231041669845581},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3384746313095093},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.14008376002311707},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.07566964626312256}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6803261041641235},{"id":"https://openalex.org/C17829176","wikidata":"https://www.wikidata.org/wiki/Q179043","display_name":"Electrical impedance","level":2,"score":0.6405574679374695},{"id":"https://openalex.org/C32211213","wikidata":"https://www.wikidata.org/wiki/Q47083","display_name":"Ohm","level":2,"score":0.5936216711997986},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.5889685153961182},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.5441043376922607},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5407713651657104},{"id":"https://openalex.org/C58112919","wikidata":"https://www.wikidata.org/wiki/Q631203","display_name":"Output impedance","level":3,"score":0.5338925719261169},{"id":"https://openalex.org/C165838908","wikidata":"https://www.wikidata.org/wiki/Q736777","display_name":"Calibration","level":2,"score":0.5090298652648926},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.48709607124328613},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4793858528137207},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4720797538757324},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4644268751144409},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.43973395228385925},{"id":"https://openalex.org/C612350","wikidata":"https://www.wikidata.org/wiki/Q1761108","display_name":"Impedance matching","level":3,"score":0.430814653635025},{"id":"https://openalex.org/C198352243","wikidata":"https://www.wikidata.org/wiki/Q37105","display_name":"Line (geometry)","level":2,"score":0.4231041669845581},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3384746313095093},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.14008376002311707},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.07566964626312256},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/socc.2013.6749665","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2013.6749665","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE International SOC Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7799999713897705,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1997403079","https://openalex.org/W2139249210","https://openalex.org/W2143401812","https://openalex.org/W2167360954","https://openalex.org/W4237282970"],"related_works":["https://openalex.org/W2087608731","https://openalex.org/W2145437567","https://openalex.org/W1486956228","https://openalex.org/W2321700832","https://openalex.org/W2375855844","https://openalex.org/W4297786912","https://openalex.org/W3089955042","https://openalex.org/W2126751867","https://openalex.org/W2104489486","https://openalex.org/W2136855998"],"abstract_inverted_index":{"Dynamically":[0],"calibrated":[1],"driver":[2,17],"block":[3],"is":[4],"presented":[5],"which":[6],"automatically":[7],"adapts":[8],"its":[9,24],"termination":[10],"resistance":[11],"to":[12,23,60,90],"the":[13,19,46,50,56,63,75],"channel's":[14],"impedance.":[15],"The":[16],"senses":[18],"channel":[20],"and":[21,83],"calibrates":[22],"characteristic":[25],"impedance":[26,58],"anywhere":[27],"between":[28],"30":[29],"-":[30,88],"120":[31],"ohms.":[32],"This":[33],"circuit":[34],"functions":[35],"successfully":[36],"for":[37],"a":[38],"minimum":[39],"propagation":[40],"delay":[41],"of":[42,62,68,87],"500":[43],"ps":[44],"on":[45,49],"channel.":[47],"Results":[48],"STM":[51],"CMOS":[52],"40LP":[53],"process":[54],"confirm":[55],"driver's":[57],"match":[59],"that":[61],"line":[64],"with":[65,71],"an":[66],"accuracy":[67],"+/-":[69,77],"8%":[70],"+/-3\u03c3":[72],"variation":[73,85],"in":[74],"process,":[76],"10%":[78],"voltage":[79],"spread":[80],"at":[81],"2.5V":[82],"temperature":[84],"range":[86],"40":[89],"125":[91],"degrees":[92],"centigrade.":[93]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}