{"id":"https://openalex.org/W1967725270","doi":"https://doi.org/10.1109/socc.2012.6398337","title":"A novel flexible foldable systolic architecture FIR filters generator","display_name":"A novel flexible foldable systolic architecture FIR filters generator","publication_year":2012,"publication_date":"2012-09-01","ids":{"openalex":"https://openalex.org/W1967725270","doi":"https://doi.org/10.1109/socc.2012.6398337","mag":"1967725270"},"language":"en","primary_location":{"id":"doi:10.1109/socc.2012.6398337","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2012.6398337","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE International SOC Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5002236825","display_name":"Hang Yin","orcid":"https://orcid.org/0000-0002-0889-3902"},"institutions":[{"id":"https://openalex.org/I75689368","display_name":"Communication University of China","ror":"https://ror.org/04facbs33","country_code":"CN","type":"education","lineage":["https://openalex.org/I75689368"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Hang Yin","raw_affiliation_strings":["Engineering Center of Digital Audio and Video, Communication University of China, China","Engineering Center of Digital Audio and Video, Communication University of China"],"affiliations":[{"raw_affiliation_string":"Engineering Center of Digital Audio and Video, Communication University of China, China","institution_ids":["https://openalex.org/I75689368"]},{"raw_affiliation_string":"Engineering Center of Digital Audio and Video, Communication University of China","institution_ids":["https://openalex.org/I75689368"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100544782","display_name":"Weitao Du","orcid":null},"institutions":[{"id":"https://openalex.org/I75689368","display_name":"Communication University of China","ror":"https://ror.org/04facbs33","country_code":"CN","type":"education","lineage":["https://openalex.org/I75689368"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Weitao Du","raw_affiliation_strings":["Engineering Center of Digital Audio and Video, Communication University of China, China","Engineering Center of Digital Audio and Video, Communication University of China"],"affiliations":[{"raw_affiliation_string":"Engineering Center of Digital Audio and Video, Communication University of China, China","institution_ids":["https://openalex.org/I75689368"]},{"raw_affiliation_string":"Engineering Center of Digital Audio and Video, Communication University of China","institution_ids":["https://openalex.org/I75689368"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100721274","display_name":"Yu Hen Hu","orcid":"https://orcid.org/0000-0003-3427-0677"},"institutions":[{"id":"https://openalex.org/I135310074","display_name":"University of Wisconsin\u2013Madison","ror":"https://ror.org/01y2jtd41","country_code":"US","type":"education","lineage":["https://openalex.org/I135310074"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yu Hen Hu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Wisconsin, Madison, USA","[Dept. of Electrical and Computer Engineering, University of Wisconsin-Madison]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Wisconsin, Madison, USA","institution_ids":["https://openalex.org/I135310074"]},{"raw_affiliation_string":"[Dept. of Electrical and Computer Engineering, University of Wisconsin-Madison]","institution_ids":["https://openalex.org/I135310074"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5108612480","display_name":"Rui Lv","orcid":"https://orcid.org/0009-0007-1443-1097"},"institutions":[{"id":"https://openalex.org/I75689368","display_name":"Communication University of China","ror":"https://ror.org/04facbs33","country_code":"CN","type":"education","lineage":["https://openalex.org/I75689368"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Rui Lv","raw_affiliation_strings":["Engineering Center of Digital Audio and Video, Communication University of China, China","Engineering Center of Digital Audio and Video, Communication University of China"],"affiliations":[{"raw_affiliation_string":"Engineering Center of Digital Audio and Video, Communication University of China, China","institution_ids":["https://openalex.org/I75689368"]},{"raw_affiliation_string":"Engineering Center of Digital Audio and Video, Communication University of China","institution_ids":["https://openalex.org/I75689368"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5002236825"],"corresponding_institution_ids":["https://openalex.org/I75689368"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.05621888,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"334","last_page":"339"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11233","display_name":"Advanced Adaptive Filtering Techniques","score":0.9921000003814697,"subfield":{"id":"https://openalex.org/subfields/2206","display_name":"Computational Mechanics"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/systolic-array","display_name":"Systolic array","score":0.8057210445404053},{"id":"https://openalex.org/keywords/folding","display_name":"Folding (DSP implementation)","score":0.8044408559799194},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7869136929512024},{"id":"https://openalex.org/keywords/finite-impulse-response","display_name":"Finite impulse response","score":0.7044880390167236},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6006521582603455},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.5287118554115295},{"id":"https://openalex.org/keywords/generator","display_name":"Generator (circuit theory)","score":0.5073315501213074},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4882621765136719},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.47913119196891785},{"id":"https://openalex.org/keywords/digital-filter","display_name":"Digital filter","score":0.4619920551776886},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3941713571548462},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.37681347131729126},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.36121487617492676},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.33101290464401245},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24021682143211365},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.1340819001197815},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.12369894981384277},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.10878542065620422}],"concepts":[{"id":"https://openalex.org/C150741067","wikidata":"https://www.wikidata.org/wiki/Q2377218","display_name":"Systolic array","level":3,"score":0.8057210445404053},{"id":"https://openalex.org/C2776545253","wikidata":"https://www.wikidata.org/wiki/Q5464292","display_name":"Folding (DSP implementation)","level":2,"score":0.8044408559799194},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7869136929512024},{"id":"https://openalex.org/C198386975","wikidata":"https://www.wikidata.org/wiki/Q117785","display_name":"Finite impulse response","level":2,"score":0.7044880390167236},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6006521582603455},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.5287118554115295},{"id":"https://openalex.org/C2780992000","wikidata":"https://www.wikidata.org/wiki/Q17016113","display_name":"Generator (circuit theory)","level":3,"score":0.5073315501213074},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4882621765136719},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.47913119196891785},{"id":"https://openalex.org/C36390408","wikidata":"https://www.wikidata.org/wiki/Q1163067","display_name":"Digital filter","level":3,"score":0.4619920551776886},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3941713571548462},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.37681347131729126},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36121487617492676},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.33101290464401245},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24021682143211365},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.1340819001197815},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.12369894981384277},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.10878542065620422},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/socc.2012.6398337","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2012.6398337","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE International SOC Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W124596592","https://openalex.org/W1662114873","https://openalex.org/W1910331302","https://openalex.org/W2125607025","https://openalex.org/W2147623320","https://openalex.org/W4285719527","https://openalex.org/W6637130362"],"related_works":["https://openalex.org/W2352374383","https://openalex.org/W1980880153","https://openalex.org/W2810377961","https://openalex.org/W2046083070","https://openalex.org/W1505918581","https://openalex.org/W2031512523","https://openalex.org/W2379702749","https://openalex.org/W1751484597","https://openalex.org/W2167334192","https://openalex.org/W1902114972"],"abstract_inverted_index":{"A":[0],"novel":[1],"design":[2,48,57],"tool":[3,24],"for":[4],"flexible":[5],"implementation":[6],"of":[7,38,65],"FIR":[8,22,56,69],"digital":[9],"Filters":[10],"on":[11],"a":[12,17],"FPGA":[13,68],"is":[14,25,51],"presented.":[15],"Leveraging":[16],"folding":[18,49],"systolic":[19,39,46],"architecture,":[20],"this":[21,43],"generation":[23],"able":[26],"to":[27,55],"offer":[28],"optimal":[29],"performance":[30],"versus":[31],"chip":[32],"area":[33],"trade-offs":[34],"with":[35],"different":[36],"levels":[37],"array":[40,47],"folding.":[41],"In":[42],"paper,":[44],"the":[45,66,71],"theory":[50],"presented":[52],"and":[53],"applications":[54],"space":[58],"exploration":[59],"are":[60],"discussed.":[61],"Compared":[62],"against":[63],"state":[64],"art":[67],"structure,":[70],"proposed":[72],"structure":[73],"demonstrates":[74],"clear":[75],"advantages.":[76]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
