{"id":"https://openalex.org/W2070389616","doi":"https://doi.org/10.1109/socc.2012.6398325","title":"A power-area analysis of NoCs in FPGAs","display_name":"A power-area analysis of NoCs in FPGAs","publication_year":2012,"publication_date":"2012-09-01","ids":{"openalex":"https://openalex.org/W2070389616","doi":"https://doi.org/10.1109/socc.2012.6398325","mag":"2070389616"},"language":"en","primary_location":{"id":"doi:10.1109/socc.2012.6398325","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2012.6398325","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE International SOC Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5024543296","display_name":"Mohammadreza Binesh Marvasti","orcid":"https://orcid.org/0000-0003-4378-0628"},"institutions":[{"id":"https://openalex.org/I98251732","display_name":"McMaster University","ror":"https://ror.org/02fa3aq29","country_code":"CA","type":"education","lineage":["https://openalex.org/I98251732"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"M. Binesh Marvasti","raw_affiliation_strings":["Department of ECE, McMaster University, Canada","[Department of ECE, McMaster University, Canada]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of ECE, McMaster University, Canada","institution_ids":["https://openalex.org/I98251732"]},{"raw_affiliation_string":"[Department of ECE, McMaster University, Canada]","institution_ids":["https://openalex.org/I98251732"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5114374141","display_name":"Ted H. Szymanski","orcid":"https://orcid.org/0000-0001-8429-1180"},"institutions":[{"id":"https://openalex.org/I98251732","display_name":"McMaster University","ror":"https://ror.org/02fa3aq29","country_code":"CA","type":"education","lineage":["https://openalex.org/I98251732"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"T. H. Szymanski","raw_affiliation_strings":["Department of ECE, McMaster University, Canada","[Department of ECE, McMaster University, Canada]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of ECE, McMaster University, Canada","institution_ids":["https://openalex.org/I98251732"]},{"raw_affiliation_string":"[Department of ECE, McMaster University, Canada]","institution_ids":["https://openalex.org/I98251732"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I98251732"],"apc_list":null,"apc_paid":null,"fwci":1.1182,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.80065095,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"295","last_page":"300"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9908999800682068,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9901000261306763,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/crossbar-switch","display_name":"Crossbar switch","score":0.8102184534072876},{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.7587530016899109},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7586819529533386},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6939797401428223},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6203168630599976},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.6172598600387573},{"id":"https://openalex.org/keywords/hypercube","display_name":"Hypercube","score":0.5563367009162903},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4396606683731079},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.4271528422832489},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.4244336485862732},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4213690459728241},{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.413994163274765},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3728485703468323},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.21045681834220886},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.11595621705055237}],"concepts":[{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.8102184534072876},{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.7587530016899109},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7586819529533386},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6939797401428223},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6203168630599976},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.6172598600387573},{"id":"https://openalex.org/C50820777","wikidata":"https://www.wikidata.org/wiki/Q213723","display_name":"Hypercube","level":2,"score":0.5563367009162903},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4396606683731079},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.4271528422832489},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.4244336485862732},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4213690459728241},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.413994163274765},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3728485703468323},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.21045681834220886},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.11595621705055237},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/socc.2012.6398325","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2012.6398325","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE International SOC Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1963638851","https://openalex.org/W2048789167","https://openalex.org/W2093283689","https://openalex.org/W2114132403","https://openalex.org/W2115493560","https://openalex.org/W2118799833","https://openalex.org/W2122337686","https://openalex.org/W2123184444","https://openalex.org/W2124125370","https://openalex.org/W2143459860","https://openalex.org/W2149935279","https://openalex.org/W2151673292","https://openalex.org/W3144369919","https://openalex.org/W3150157207","https://openalex.org/W6682502131"],"related_works":["https://openalex.org/W2375311683","https://openalex.org/W2366062860","https://openalex.org/W2145932742","https://openalex.org/W2373777250","https://openalex.org/W2353956655","https://openalex.org/W2020653254","https://openalex.org/W2554791727","https://openalex.org/W2352072014","https://openalex.org/W2352167000","https://openalex.org/W3038685860"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"we":[3,25],"present":[4,26],"accurate":[5,27],"analytic":[6,28,72],"models":[7,29,73],"for":[8,30],"the":[9,31,42,48,71],"area,":[10,32],"delay":[11,33],"and":[12,34,44,60,93],"power":[13,35],"of":[14,36,39,51,66,70,91],"NoC":[15,40,84],"routers":[16],"realized":[17,46],"in":[18],"FPGA":[19],"technology.":[20],"Using":[21],"these":[22],"router":[23,54],"models,":[24],"two":[37],"classes":[38],"topologies,":[41],"Torus":[43],"Generalized-Hypercube,":[45],"with":[47,63],"Altera":[49],"Family":[50],"FPGAs.":[52],"Several":[53],"designs":[55,62],"are":[56,74],"explored,":[57],"including":[58],"unpipelined":[59],"pipelined":[61],"arbitrary":[64],"amounts":[65],"buffering.":[67],"The":[68],"accuracy":[69],"evaluated":[75],"by":[76],"excessive":[77],"experimental":[78],"results.":[79],"Architectural":[80],"choices":[81],"such":[82],"as":[83],"topology,":[85],"buffer":[86],"sizing,":[87],"crossbar":[88],"switch,":[89],"degree":[90],"contraction":[92],"pipelining":[94],"can":[95],"be":[96],"explored":[97],"analytically.":[98]},"counts_by_year":[{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}
