{"id":"https://openalex.org/W2047481946","doi":"https://doi.org/10.1109/socc.2011.6085108","title":"VLSI design of area-efficient memory access architectures for quasi-cyclic LDPC codes","display_name":"VLSI design of area-efficient memory access architectures for quasi-cyclic LDPC codes","publication_year":2011,"publication_date":"2011-09-01","ids":{"openalex":"https://openalex.org/W2047481946","doi":"https://doi.org/10.1109/socc.2011.6085108","mag":"2047481946"},"language":"en","primary_location":{"id":"doi:10.1109/socc.2011.6085108","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2011.6085108","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 IEEE International SOC Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5053167526","display_name":"Ming\u2010Der Shieh","orcid":"https://orcid.org/0000-0002-7361-1860"},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Ming-Der Shieh","raw_affiliation_strings":["Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan","Department of Electrical Engineering, National Cheng Kung University, Tainan 701, Taiwan#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan","institution_ids":["https://openalex.org/I91807558"]},{"raw_affiliation_string":"Department of Electrical Engineering, National Cheng Kung University, Tainan 701, Taiwan#TAB#","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109078125","display_name":"Shih-Hao Fang","orcid":null},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shih-Hao Fang","raw_affiliation_strings":["Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan","Department of Electrical Engineering, National Cheng Kung University, Tainan 701, Taiwan#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan","institution_ids":["https://openalex.org/I91807558"]},{"raw_affiliation_string":"Department of Electrical Engineering, National Cheng Kung University, Tainan 701, Taiwan#TAB#","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075605082","display_name":"Shing-Chung Tang","orcid":null},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shing-Chung Tang","raw_affiliation_strings":["Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan","Department of Electrical Engineering, National Cheng Kung University, Tainan 701, Taiwan#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan","institution_ids":["https://openalex.org/I91807558"]},{"raw_affiliation_string":"Department of Electrical Engineering, National Cheng Kung University, Tainan 701, Taiwan#TAB#","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103416326","display_name":"Der-Wei Yang","orcid":null},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Der-Wei Yang","raw_affiliation_strings":["Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan","Department of Electrical Engineering, National Cheng Kung University, Tainan 701, Taiwan#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan","institution_ids":["https://openalex.org/I91807558"]},{"raw_affiliation_string":"Department of Electrical Engineering, National Cheng Kung University, Tainan 701, Taiwan#TAB#","institution_ids":["https://openalex.org/I91807558"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5053167526"],"corresponding_institution_ids":["https://openalex.org/I91807558"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.13833736,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"242","last_page":"246"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10796","display_name":"Cooperative Communication and Network Coding","score":0.995199978351593,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7961995005607605},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.7055177688598633},{"id":"https://openalex.org/keywords/low-density-parity-check-code","display_name":"Low-density parity-check code","score":0.7038083672523499},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6572961807250977},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.45467859506607056},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.45081788301467896},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4458165168762207},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.40863415598869324},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3476327061653137},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2908034324645996},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.21670034527778625}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7961995005607605},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7055177688598633},{"id":"https://openalex.org/C67692717","wikidata":"https://www.wikidata.org/wiki/Q187444","display_name":"Low-density parity-check code","level":3,"score":0.7038083672523499},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6572961807250977},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.45467859506607056},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.45081788301467896},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4458165168762207},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.40863415598869324},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3476327061653137},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2908034324645996},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.21670034527778625},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/socc.2011.6085108","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2011.6085108","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 IEEE International SOC Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2060144433","https://openalex.org/W2096084217","https://openalex.org/W2105537267","https://openalex.org/W2107301532","https://openalex.org/W2115353412","https://openalex.org/W2125117492","https://openalex.org/W2128765501","https://openalex.org/W2129475459"],"related_works":["https://openalex.org/W2903058006","https://openalex.org/W2102374550","https://openalex.org/W2134640991","https://openalex.org/W3027318491","https://openalex.org/W101478184","https://openalex.org/W2154560316","https://openalex.org/W2105031241","https://openalex.org/W2001585562","https://openalex.org/W2077105843","https://openalex.org/W2112804590"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"an":[3],"area-efficient":[4],"memory":[5,11,14,24],"access":[6],"architecture":[7],"that":[8],"merges":[9],"small":[10,23],"blocks":[12],"into":[13],"groups":[15],"to":[16,32],"relax":[17],"the":[18,34,43],"effect":[19],"of":[20],"peripherals":[21],"in":[22],"blocks.":[25],"An":[26],"efficient":[27],"algorithm":[28],"is":[29],"also":[30],"presented":[31],"handle":[33],"additional":[35],"delay":[36],"elements.":[37],"The":[38],"proposed":[39],"LDPC":[40],"decoder":[41],"has":[42],"lowest":[44],"area":[45],"complexity":[46],"among":[47],"related":[48],"studies.":[49]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
