{"id":"https://openalex.org/W2116172876","doi":"https://doi.org/10.1109/socc.2010.5784745","title":"Unleash the parallelism of 3DIC partitioning on GPGPU","display_name":"Unleash the parallelism of 3DIC partitioning on GPGPU","publication_year":2010,"publication_date":"2010-09-01","ids":{"openalex":"https://openalex.org/W2116172876","doi":"https://doi.org/10.1109/socc.2010.5784745","mag":"2116172876"},"language":"en","primary_location":{"id":"doi:10.1109/socc.2010.5784745","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2010.5784745","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"23rd IEEE International SOC Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5108201154","display_name":"Hsien-Kai Kuo","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Hsien-Kai Kuo","raw_affiliation_strings":["Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","Dept. of Electronics Engineering, National Chiao Tung University, Hsinchu 30010, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Dept. of Electronics Engineering, National Chiao Tung University, Hsinchu 30010, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013913342","display_name":"Bo\u2010Cheng Lai","orcid":"https://orcid.org/0000-0002-9729-5196"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Bo-Cheng Charles Lai","raw_affiliation_strings":["Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","Dept. of Electronics Engineering, National Chiao Tung University, Hsinchu 30010, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Dept. of Electronics Engineering, National Chiao Tung University, Hsinchu 30010, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111925764","display_name":"Jing-Yang Jou","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Jing-Yang Jou","raw_affiliation_strings":["Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","Dept. of Electronics Engineering, National Chiao Tung University, Hsinchu 30010, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Dept. of Electronics Engineering, National Chiao Tung University, Hsinchu 30010, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5108201154"],"corresponding_institution_ids":["https://openalex.org/I148366613"],"apc_list":null,"apc_paid":null,"fwci":0.5773,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.73045432,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"127","last_page":"132"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.9139673709869385},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.8658214807510376},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8216842412948608},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.7824394702911377},{"id":"https://openalex.org/keywords/general-purpose-computing-on-graphics-processing-units","display_name":"General-purpose computing on graphics processing units","score":0.5933888554573059},{"id":"https://openalex.org/keywords/cuda","display_name":"CUDA","score":0.5337017178535461},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.47971194982528687},{"id":"https://openalex.org/keywords/graphics","display_name":"Graphics","score":0.22212928533554077}],"concepts":[{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.9139673709869385},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.8658214807510376},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8216842412948608},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.7824394702911377},{"id":"https://openalex.org/C50630238","wikidata":"https://www.wikidata.org/wiki/Q971505","display_name":"General-purpose computing on graphics processing units","level":3,"score":0.5933888554573059},{"id":"https://openalex.org/C2778119891","wikidata":"https://www.wikidata.org/wiki/Q477690","display_name":"CUDA","level":2,"score":0.5337017178535461},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.47971194982528687},{"id":"https://openalex.org/C21442007","wikidata":"https://www.wikidata.org/wiki/Q1027879","display_name":"Graphics","level":2,"score":0.22212928533554077},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C121684516","wikidata":"https://www.wikidata.org/wiki/Q7600677","display_name":"Computer graphics (images)","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/socc.2010.5784745","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2010.5784745","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"23rd IEEE International SOC Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5400000214576721,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1984429368","https://openalex.org/W2009795871","https://openalex.org/W2065874420","https://openalex.org/W2074140323","https://openalex.org/W2078174680","https://openalex.org/W2095117703","https://openalex.org/W2109558424","https://openalex.org/W2119428232","https://openalex.org/W2120970098","https://openalex.org/W2143006079","https://openalex.org/W3148440458"],"related_works":["https://openalex.org/W2983282793","https://openalex.org/W66594024","https://openalex.org/W1973046741","https://openalex.org/W1963859303","https://openalex.org/W2364044215","https://openalex.org/W2389600408","https://openalex.org/W240129890","https://openalex.org/W3048701459","https://openalex.org/W2149078538","https://openalex.org/W2370314112"],"abstract_inverted_index":{"Taking":[0],"full":[1],"advantage":[2],"of":[3,43,65,106],"3DIC":[4,24,53],"technology":[5],"requires":[6],"innovative":[7],"EDA":[8,45],"tools":[9],"that":[10],"can":[11,114],"optimize":[12],"a":[13,35,51],"multi-layered":[14,23],"complex":[15],"system.":[16],"However,":[17],"the":[18,22,39,58,63,71,76,86,92,100,111],"optimization":[19,77,87],"algorithms":[20],"on":[21,99],"are":[25],"usually":[26],"computationally":[27],"expensive.":[28],"Parallel":[29],"computing":[30],"has":[31],"been":[32],"considered":[33],"as":[34],"solution":[36],"to":[37,74,84,91],"manage":[38],"exploding":[40],"computational":[41],"requirement":[42],"future":[44],"tools.":[46],"This":[47],"paper":[48],"proposes":[49],"PP3D,":[50],"parallel":[52,72],"partitioning":[54],"algorithm.":[55,67],"PP3D":[56,89],"enhances":[57],"execution":[59,73],"speed":[60],"by":[61],"exposing":[62],"parallelism":[64],"FM":[66],"It":[68],"also":[69],"coordinates":[70],"retain":[75],"quality.":[78],"A":[79],"design":[80],"methodology":[81],"is":[82],"proposed":[83],"streamline":[85],"from":[88],"algorithm":[90],"underlying":[93],"GPGPU":[94],"many-core":[95],"architecture.":[96],"The":[97],"results":[98],"ISPD98":[101],"benchmark":[102],"demonstrate":[103],"an":[104],"average":[105],"15X":[107],"runtime":[108],"speedup,":[109],"while":[110],"maximum":[112],"speedup":[113],"reach":[115],"37X.":[116]},"counts_by_year":[{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}