{"id":"https://openalex.org/W2139702550","doi":"https://doi.org/10.1109/socc.2009.5335682","title":"Diagnosis of faults in template-based asynchronous circuits","display_name":"Diagnosis of faults in template-based asynchronous circuits","publication_year":2009,"publication_date":"2009-10-01","ids":{"openalex":"https://openalex.org/W2139702550","doi":"https://doi.org/10.1109/socc.2009.5335682","mag":"2139702550"},"language":"en","primary_location":{"id":"doi:10.1109/socc.2009.5335682","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2009.5335682","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 International Symposium on System-on-Chip","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5028010546","display_name":"Behnam Ghavami","orcid":"https://orcid.org/0000-0001-5391-383X"},"institutions":[{"id":"https://openalex.org/I158248296","display_name":"Amirkabir University of Technology","ror":"https://ror.org/04gzbav43","country_code":"IR","type":"education","lineage":["https://openalex.org/I158248296"]}],"countries":["IR"],"is_corresponding":true,"raw_author_name":"Behnam Ghavami","raw_affiliation_strings":["Department of Computer Engineering and Information Technology, Amirkabir University of Technology\uc2a0, Tehran, Iran"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering and Information Technology, Amirkabir University of Technology\uc2a0, Tehran, Iran","institution_ids":["https://openalex.org/I158248296"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073506690","display_name":"Hamid-Reza Zarandi","orcid":null},"institutions":[{"id":"https://openalex.org/I158248296","display_name":"Amirkabir University of Technology","ror":"https://ror.org/04gzbav43","country_code":"IR","type":"education","lineage":["https://openalex.org/I158248296"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Hamid-Reza Zarandi","raw_affiliation_strings":["Department of Computer Engineering and Information Technology, Amirkabir University of Technology\uc2a0, Tehran, Iran"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering and Information Technology, Amirkabir University of Technology\uc2a0, Tehran, Iran","institution_ids":["https://openalex.org/I158248296"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003502349","display_name":"Arezoo Salarpour","orcid":null},"institutions":[{"id":"https://openalex.org/I67009956","display_name":"Iran University of Science and Technology","ror":"https://ror.org/01jw2p796","country_code":"IR","type":"education","lineage":["https://openalex.org/I67009956"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Arezoo Salarpour","raw_affiliation_strings":["Computer Engineering Department, University of Science and Technology, Tehran, Iran"],"affiliations":[{"raw_affiliation_string":"Computer Engineering Department, University of Science and Technology, Tehran, Iran","institution_ids":["https://openalex.org/I67009956"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5085021768","display_name":"Hossein Pedram","orcid":"https://orcid.org/0000-0002-2331-0568"},"institutions":[{"id":"https://openalex.org/I158248296","display_name":"Amirkabir University of Technology","ror":"https://ror.org/04gzbav43","country_code":"IR","type":"education","lineage":["https://openalex.org/I158248296"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Hossein Pedram","raw_affiliation_strings":["Department of Computer Engineering and Information Technology, Amirkabir University of Technology\uc2a0, Tehran, Iran"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering and Information Technology, Amirkabir University of Technology\uc2a0, Tehran, Iran","institution_ids":["https://openalex.org/I158248296"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5028010546"],"corresponding_institution_ids":["https://openalex.org/I158248296"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.15499145,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"1855","issue":null,"first_page":"038","last_page":"041"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/handshaking","display_name":"Handshaking","score":0.9736720323562622},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.8385806679725647},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8322107791900635},{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.7831443548202515},{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.7234495282173157},{"id":"https://openalex.org/keywords/template","display_name":"Template","score":0.6179627776145935},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.47446209192276},{"id":"https://openalex.org/keywords/state","display_name":"State (computer science)","score":0.44458574056625366},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.4123203158378601},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3918067514896393},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.36620938777923584},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3478063941001892},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.33853334188461304},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3273259401321411},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.32302194833755493},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.26395183801651},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2603861689567566},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.23242822289466858},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.18763864040374756},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.1212320625782013},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.11325728893280029},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.08808326721191406}],"concepts":[{"id":"https://openalex.org/C58861099","wikidata":"https://www.wikidata.org/wiki/Q548838","display_name":"Handshaking","level":2,"score":0.9736720323562622},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.8385806679725647},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8322107791900635},{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.7831443548202515},{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.7234495282173157},{"id":"https://openalex.org/C82714645","wikidata":"https://www.wikidata.org/wiki/Q438331","display_name":"Template","level":2,"score":0.6179627776145935},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.47446209192276},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.44458574056625366},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.4123203158378601},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3918067514896393},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.36620938777923584},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3478063941001892},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.33853334188461304},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3273259401321411},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.32302194833755493},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.26395183801651},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2603861689567566},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.23242822289466858},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.18763864040374756},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.1212320625782013},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.11325728893280029},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.08808326721191406},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/socc.2009.5335682","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2009.5335682","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 International Symposium on System-on-Chip","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W16511050","https://openalex.org/W1554812212","https://openalex.org/W1611031369","https://openalex.org/W1951899050","https://openalex.org/W2029005287","https://openalex.org/W2096906056","https://openalex.org/W2117939640","https://openalex.org/W2123613958","https://openalex.org/W2125667788","https://openalex.org/W2150872535","https://openalex.org/W2507324161","https://openalex.org/W4246920838","https://openalex.org/W4285719527","https://openalex.org/W6600687751","https://openalex.org/W6633282629","https://openalex.org/W6674720022","https://openalex.org/W6678646387","https://openalex.org/W6725081203"],"related_works":["https://openalex.org/W2517825401","https://openalex.org/W2146502274","https://openalex.org/W2031351902","https://openalex.org/W2945361966","https://openalex.org/W3083668959","https://openalex.org/W4245538934","https://openalex.org/W2136922322","https://openalex.org/W4312248061","https://openalex.org/W2123861710","https://openalex.org/W2184538773"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"an":[3,14],"intrinsically":[4],"verifiable":[5],"library":[6],"of":[7,39,56],"quasi":[8],"delay":[9],"insensitive":[10],"asynchronous":[11,20],"templates":[12,61],"providing":[13],"efficient":[15],"debugging":[16],"platform":[17],"for":[18],"large":[19],"circuits.":[21],"We":[22],"proposed":[23],"using":[24],"state":[25],"transition":[26],"graph":[27],"to":[28],"determining":[29],"necessary":[30,57],"properties":[31,48],"which":[32,49],"must":[33],"be":[34,81],"checked.":[35],"For":[36],"every":[37],"template":[38],"a":[40,69],"pre-charged":[41],"full":[42],"buffer":[43],"library,":[44],"we":[45],"defined":[46],"PSL":[47],"are":[50],"used":[51],"as":[52],"monitors":[53],"verifying":[54],"correctness":[55],"handshaking":[58,78],"protocols":[59,79],"between":[60],"under":[62],"simulation.":[63],"Experimental":[64],"results":[65],"show":[66],"that":[67],"with":[68],"8%":[70],"increase":[71],"in":[72,77],"simulation":[73],"time,":[74],"all":[75],"faults":[76],"can":[80],"detected.":[82]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}