{"id":"https://openalex.org/W2169009507","doi":"https://doi.org/10.1109/socc.2008.4641543","title":"A timing methodology considering within-die clock skew variations","display_name":"A timing methodology considering within-die clock skew variations","publication_year":2008,"publication_date":"2008-09-01","ids":{"openalex":"https://openalex.org/W2169009507","doi":"https://doi.org/10.1109/socc.2008.4641543","mag":"2169009507"},"language":"en","primary_location":{"id":"doi:10.1109/socc.2008.4641543","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2008.4641543","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International SOC Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5063108320","display_name":"Savithri Sundareswaran","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Savithri Sundareswaran","raw_affiliation_strings":["Freescale Semiconductor, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Freescale Semiconductor, Austin, TX, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5098636533","display_name":"Lucie Nechanicka","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Lucie Nechanicka","raw_affiliation_strings":["Freescale Semiconductor, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Freescale Semiconductor, Austin, TX, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100904984","display_name":"Rajendran Panda","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Rajendran Panda","raw_affiliation_strings":["Freescale Semiconductor, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Freescale Semiconductor, Austin, TX, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053906683","display_name":"S. V. Gavrilov","orcid":"https://orcid.org/0000-0003-0566-4482"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Sergey Gavrilov","raw_affiliation_strings":["Microstyle, Moscow, Russia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microstyle, Moscow, Russia","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000408509","display_name":"Roman Solovyev","orcid":"https://orcid.org/0000-0003-0312-452X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Roman Solovyev","raw_affiliation_strings":["Microstyle, Moscow, Russia","Freescale Semiconductor, Inc., Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microstyle, Moscow, Russia","institution_ids":[]},{"raw_affiliation_string":"Freescale Semiconductor, Inc., Austin, TX, USA","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068070739","display_name":"Jacob A. Abraham","orcid":"https://orcid.org/0000-0002-5336-5631"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jacob A. Abraham","raw_affiliation_strings":["The University of Texas, Austin, USA","University of Technology, Austin, TX, USA","The University of Texas, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of Texas, Austin, USA","institution_ids":["https://openalex.org/I86519309"]},{"raw_affiliation_string":"University of Technology, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]},{"raw_affiliation_string":"The University of Texas, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.0175,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.79946872,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"351","last_page":"356"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/margin","display_name":"Margin (machine learning)","score":0.8413503766059875},{"id":"https://openalex.org/keywords/skew","display_name":"Skew","score":0.7981594800949097},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.7244055867195129},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.6153160929679871},{"id":"https://openalex.org/keywords/timing-failure","display_name":"Timing failure","score":0.5959939360618591},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.5011227130889893},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5002968311309814},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4547847509384155},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.42377936840057373},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3367496728897095},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19762736558914185},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.1615695357322693},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.14304488897323608},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.10088717937469482},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.0912921130657196},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09057337045669556}],"concepts":[{"id":"https://openalex.org/C774472","wikidata":"https://www.wikidata.org/wiki/Q6760393","display_name":"Margin (machine learning)","level":2,"score":0.8413503766059875},{"id":"https://openalex.org/C43711488","wikidata":"https://www.wikidata.org/wiki/Q7534783","display_name":"Skew","level":2,"score":0.7981594800949097},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.7244055867195129},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.6153160929679871},{"id":"https://openalex.org/C104654189","wikidata":"https://www.wikidata.org/wiki/Q7806740","display_name":"Timing failure","level":5,"score":0.5959939360618591},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.5011227130889893},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5002968311309814},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4547847509384155},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.42377936840057373},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3367496728897095},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19762736558914185},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.1615695357322693},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.14304488897323608},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.10088717937469482},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.0912921130657196},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09057337045669556},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/socc.2008.4641543","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2008.4641543","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International SOC Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5799999833106995,"display_name":"Peace, Justice and strong institutions","id":"https://metadata.un.org/sdg/16"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W2070987214","https://openalex.org/W2098440959","https://openalex.org/W2101203558","https://openalex.org/W2106565868","https://openalex.org/W2109195618","https://openalex.org/W2114336500","https://openalex.org/W2130601386","https://openalex.org/W2143901474","https://openalex.org/W4210387736","https://openalex.org/W4230035938","https://openalex.org/W4238724481","https://openalex.org/W4247815215","https://openalex.org/W4250203230","https://openalex.org/W6675296684","https://openalex.org/W6679176051"],"related_works":["https://openalex.org/W2116514610","https://openalex.org/W2116259070","https://openalex.org/W2163318442","https://openalex.org/W2003180247","https://openalex.org/W3201048403","https://openalex.org/W2123512677","https://openalex.org/W2011677428","https://openalex.org/W2128528443","https://openalex.org/W4232019485","https://openalex.org/W2144282137"],"abstract_inverted_index":{"Timing":[0,26],"margining":[1,81],"is":[2,28],"a":[3,78,120,137],"key":[4],"component":[5],"of":[6,59,129,157],"timing":[7,60,102],"sign-off.":[8],"Insufficient":[9],"margin":[10,19,27,111,126,152],"can":[11],"lead":[12],"to":[13,30,55,68,83,90],"silicon":[14],"failure":[15],"and":[16,38,105,117,161],"excessive":[17],"pessimistic":[18],"will":[20],"entail":[21],"unnecessary":[22],"design":[23],"optimization":[24],"effort.":[25,169],"intended":[29],"cover":[31],"the":[32,50,66,70,115,130,147,151,155],"uncertainty":[33],"in":[34,110,146,166],"clock":[35,39],"arrival":[36],"times":[37],"skews":[40],"arising":[41,88],"from":[42],"within-die":[43,91],"process":[44,52],"variations.":[45,92],"In":[46,73],"highly":[47],"scaled":[48],"technologies,":[49],"increased":[51],"variations":[53,87],"tend":[54],"enforce":[56],"an":[57],"overestimation":[58],"margins":[61],"making":[62],"it":[63],"difficult":[64],"for":[65,85,107,124,133],"designs":[67],"achieve":[69],"target":[71],"performance.":[72],"this":[74],"paper,":[75],"we":[76],"present":[77,114],"more":[79],"efficient":[80],"methodology":[82,95,132],"account":[84],"clock-skew":[86],"due":[89],"The":[93],"proposed":[94,131],"fits":[96],"well":[97],"within":[98],"current":[99],"corner":[100],"based":[101],"sign-off":[103],"framework":[104],"allows":[106],"significant":[108],"reduction":[109,145,165],"pessimism.":[112],"We":[113],"results":[116],"observations":[118],"on":[119,136,142],"low":[121,138],"power":[122,139],"processor":[123,140],"hold-time":[125,158],"correction.":[127],"Evaluation":[128],"hold":[134],"analysis":[135],"shows,":[141],"average,":[143],"~67%":[144],"original":[148],"margin.":[149],"Further":[150],"correction":[153],"decreases":[154],"number":[156],"violations":[159],"significantly":[160],"effectively":[162],"achieves":[163],"10times":[164],"hold-violation":[167],"fixing":[168]},"counts_by_year":[{"year":2020,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}