{"id":"https://openalex.org/W2042669502","doi":"https://doi.org/10.1109/socc.2007.4545466","title":"QuteIP: An IP qualification framework for System on Chip","display_name":"QuteIP: An IP qualification framework for System on Chip","publication_year":2007,"publication_date":"2007-01-01","ids":{"openalex":"https://openalex.org/W2042669502","doi":"https://doi.org/10.1109/socc.2007.4545466","mag":"2042669502"},"language":"en","primary_location":{"id":"doi:10.1109/socc.2007.4545466","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2007.4545466","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IEEE International SOC Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100858458","display_name":"Hsing-Chih Hung","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Hsing-Chih Hung","raw_affiliation_strings":["Graduate Institute of Electronics Engineering, National Taiwan University, Taiwan","[Graduate Institute of Electronics Engineering, National Taiwan University, Taiwan.]"],"affiliations":[{"raw_affiliation_string":"Graduate Institute of Electronics Engineering, National Taiwan University, Taiwan","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"[Graduate Institute of Electronics Engineering, National Taiwan University, Taiwan.]","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110905349","display_name":"Ting-Hao Lin","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Ting-Hao Lin","raw_affiliation_strings":["Graduate Institute of Electronics Engineering, National Taiwan University, Taiwan","[Graduate Institute of Electronics Engineering, National Taiwan University, Taiwan.]"],"affiliations":[{"raw_affiliation_string":"Graduate Institute of Electronics Engineering, National Taiwan University, Taiwan","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"[Graduate Institute of Electronics Engineering, National Taiwan University, Taiwan.]","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5069922390","display_name":"Chung-Yang Huang","orcid":"https://orcid.org/0009-0000-8712-6957"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chung-Yang Huang","raw_affiliation_strings":["Graduate Institute of Electronics Engineering, National Taiwan University, Taiwan","[Graduate Institute of Electronics Engineering, National Taiwan University, Taiwan.]"],"affiliations":[{"raw_affiliation_string":"Graduate Institute of Electronics Engineering, National Taiwan University, Taiwan","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"[Graduate Institute of Electronics Engineering, National Taiwan University, Taiwan.]","institution_ids":["https://openalex.org/I16733864"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5100858458"],"corresponding_institution_ids":["https://openalex.org/I16733864"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.08599264,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"237","last_page":"240"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.794514536857605},{"id":"https://openalex.org/keywords/reusability","display_name":"Reusability","score":0.7592629194259644},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.625878095626831},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.5950139760971069},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.5346049070358276},{"id":"https://openalex.org/keywords/encapsulation","display_name":"Encapsulation (networking)","score":0.48141953349113464},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.46581128239631653},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4574238061904907},{"id":"https://openalex.org/keywords/point","display_name":"Point (geometry)","score":0.4125306308269501},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3252306580543518},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.12737473845481873},{"id":"https://openalex.org/keywords/computer-security","display_name":"Computer security","score":0.09168359637260437},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.0900954008102417}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.794514536857605},{"id":"https://openalex.org/C137981799","wikidata":"https://www.wikidata.org/wiki/Q1369184","display_name":"Reusability","level":3,"score":0.7592629194259644},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.625878095626831},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.5950139760971069},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.5346049070358276},{"id":"https://openalex.org/C81147070","wikidata":"https://www.wikidata.org/wiki/Q1172449","display_name":"Encapsulation (networking)","level":2,"score":0.48141953349113464},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.46581128239631653},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4574238061904907},{"id":"https://openalex.org/C28719098","wikidata":"https://www.wikidata.org/wiki/Q44946","display_name":"Point (geometry)","level":2,"score":0.4125306308269501},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3252306580543518},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.12737473845481873},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.09168359637260437},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.0900954008102417},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/socc.2007.4545466","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2007.4545466","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IEEE International SOC Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.47999998927116394,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W2104547869","https://openalex.org/W2126148497","https://openalex.org/W2142497484","https://openalex.org/W4243663926"],"related_works":["https://openalex.org/W2388040150","https://openalex.org/W4230718388","https://openalex.org/W2102117846","https://openalex.org/W2002682434","https://openalex.org/W2481546399","https://openalex.org/W3149244010","https://openalex.org/W2047284788","https://openalex.org/W2097141385","https://openalex.org/W2133408453","https://openalex.org/W1661006584"],"abstract_inverted_index":{"The":[0],"robustness":[1],"and":[2,54,60,65,160,176],"reusability":[3],"of":[4,14,39,56,103,124,181],"Intelligent":[5],"Properties":[6],"(IPs)":[7],"are":[8],"the":[9,12,15,37,42,52,75,96,100,118,136,172,179],"keys":[10],"to":[11,27,35,67,85,113,141,155],"success":[13],"modern":[16],"System":[17],"on":[18,147],"Chip":[19],"(SoC)":[20],"designs.":[21],"Therefore,":[22],"it":[23,81,107],"is":[24,108],"very":[25],"important":[26,123],"implement":[28],"a":[29,69,143],"rigid":[30],"IP":[31,87,91,119,157],"qualification":[32,120],"(IPQ)":[33],"framework":[34,76,146,154,167],"ensure":[36],"quality":[38,180],"IPs":[40],"in":[41,117,174],"SoC":[43],"design":[44,95,158,175],"flow.":[45],"In":[46],"this":[47],"paper,":[48],"we":[49],"carefully":[50],"examine":[51],"advancements":[53],"limitations":[55],"previous":[57],"IPQ":[58,71,145,166],"tools":[59],"propose":[61],"several":[62,156],"novel":[63],"concepts":[64],"methodologies":[66],"construct":[68],"new":[70],"framework.":[72],"We":[73,94,150],"make":[74],"easily":[77],"configurable":[78],"so":[79,105,134],"that":[80,106,135,164],"can":[82,168],"be":[83,139],"applied":[84],"different":[86,90],"vendors":[88],"with":[89],"users\u2019":[92],"needs.":[93],"user":[97],"interface":[98],"from":[99],"practicality":[101],"point":[102],"view":[104],"simple,":[109],"yet":[110],"complete":[111],"enough":[112],"support":[114],"various":[115],"usages":[116],"process.":[121],"Most":[122],"all,":[125],"our":[126,153,165],"implementation":[127],"does":[128],"not":[129],"include":[130],"any":[131],"proprietary":[132],"information":[133],"readers":[137],"should":[138],"able":[140],"reconstruct":[142],"similar":[144],"their":[148,161,182],"own.":[149],"have":[151],"deployed":[152],"teams":[159],"feedbacks":[162],"showed":[163],"help":[169],"them":[170],"reduce":[171],"time":[173],"greatly":[177],"improve":[178],"IPs.":[183]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}