{"id":"https://openalex.org/W2003221524","doi":"https://doi.org/10.1109/socc.2007.4545459","title":"A 65nm low power 2T1D embedded DRAM with leakage current reduction","display_name":"A 65nm low power 2T1D embedded DRAM with leakage current reduction","publication_year":2007,"publication_date":"2007-01-01","ids":{"openalex":"https://openalex.org/W2003221524","doi":"https://doi.org/10.1109/socc.2007.4545459","mag":"2003221524"},"language":"en","primary_location":{"id":"doi:10.1109/socc.2007.4545459","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2007.4545459","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IEEE International SOC Conference","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5000209674","display_name":"Mu-Tien Chang","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Mu-Tien Chang","raw_affiliation_strings":["Department of Electronics Engineering & Institute of Electronics, and Microelectronics and Information Systems Research Center, National Chiao Tung University, HsinChu, Taiwan","Department of Electronics Engineering & Institute of Electronics, and Microelectronics and Information Systems Research Center, National Chiao-Tung University, HsinChu 300, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering & Institute of Electronics, and Microelectronics and Information Systems Research Center, National Chiao Tung University, HsinChu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Department of Electronics Engineering & Institute of Electronics, and Microelectronics and Information Systems Research Center, National Chiao-Tung University, HsinChu 300, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066525875","display_name":"Po-Tsang Huang","orcid":"https://orcid.org/0000-0001-8679-2755"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Po-Tsang Huang","raw_affiliation_strings":["Department of Electronics Engineering & Institute of Electronics, and Microelectronics and Information Systems Research Center, National Chiao Tung University, HsinChu, Taiwan","Department of Electronics Engineering & Institute of Electronics, and Microelectronics and Information Systems Research Center, National Chiao-Tung University, HsinChu 300, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering & Institute of Electronics, and Microelectronics and Information Systems Research Center, National Chiao Tung University, HsinChu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Department of Electronics Engineering & Institute of Electronics, and Microelectronics and Information Systems Research Center, National Chiao-Tung University, HsinChu 300, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111568152","display_name":"Wei Hwang","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Wei Hwang","raw_affiliation_strings":["Department of Electronics Engineering & Institute of Electronics, and Microelectronics and Information Systems Research Center, National Chiao Tung University, HsinChu, Taiwan","Department of Electronics Engineering & Institute of Electronics, and Microelectronics and Information Systems Research Center, National Chiao-Tung University, HsinChu 300, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering & Institute of Electronics, and Microelectronics and Information Systems Research Center, National Chiao Tung University, HsinChu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Department of Electronics Engineering & Institute of Electronics, and Microelectronics and Information Systems Research Center, National Chiao-Tung University, HsinChu 300, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I148366613"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"207","last_page":"210"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.7711464166641235},{"id":"https://openalex.org/keywords/power-gating","display_name":"Power gating","score":0.7127756476402283},{"id":"https://openalex.org/keywords/standby-power","display_name":"Standby power","score":0.6594451665878296},{"id":"https://openalex.org/keywords/memory-cell","display_name":"Memory cell","score":0.6166283488273621},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5475380420684814},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5125231742858887},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.5120730996131897},{"id":"https://openalex.org/keywords/memory-refresh","display_name":"Memory refresh","score":0.47190672159194946},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.4658406972885132},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.46291878819465637},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.4566248655319214},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.45211729407310486},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.42507609724998474},{"id":"https://openalex.org/keywords/conventional-memory","display_name":"Conventional memory","score":0.4106544852256775},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.39056527614593506},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.38180285692214966},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.27164798974990845},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.23111629486083984},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.22549253702163696},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.22226443886756897},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2218237817287445},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.18640652298927307},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.1004398763179779},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.06322047114372253}],"concepts":[{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.7711464166641235},{"id":"https://openalex.org/C2780700455","wikidata":"https://www.wikidata.org/wiki/Q7236515","display_name":"Power gating","level":4,"score":0.7127756476402283},{"id":"https://openalex.org/C7140552","wikidata":"https://www.wikidata.org/wiki/Q1366402","display_name":"Standby power","level":3,"score":0.6594451665878296},{"id":"https://openalex.org/C2776638159","wikidata":"https://www.wikidata.org/wiki/Q18343761","display_name":"Memory cell","level":4,"score":0.6166283488273621},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5475380420684814},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5125231742858887},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.5120730996131897},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.47190672159194946},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.4658406972885132},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.46291878819465637},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.4566248655319214},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.45211729407310486},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.42507609724998474},{"id":"https://openalex.org/C53838383","wikidata":"https://www.wikidata.org/wiki/Q541148","display_name":"Conventional memory","level":5,"score":0.4106544852256775},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.39056527614593506},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.38180285692214966},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.27164798974990845},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.23111629486083984},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.22549253702163696},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.22226443886756897},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2218237817287445},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.18640652298927307},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.1004398763179779},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.06322047114372253},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/socc.2007.4545459","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2007.4545459","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IEEE International SOC Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8799999952316284}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321040","display_name":"National Science Council","ror":"https://ror.org/02kv4zf79"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1491237044","https://openalex.org/W1661368752","https://openalex.org/W2086328585","https://openalex.org/W2094660878","https://openalex.org/W2108880814","https://openalex.org/W2127190809","https://openalex.org/W2546351422","https://openalex.org/W6676056936","https://openalex.org/W6679062542"],"related_works":["https://openalex.org/W3008068282","https://openalex.org/W2896161911","https://openalex.org/W2951921863","https://openalex.org/W4243618206","https://openalex.org/W119142178","https://openalex.org/W2809388636","https://openalex.org/W4289383899","https://openalex.org/W4233769243","https://openalex.org/W2138825797","https://openalex.org/W3006167447"],"abstract_inverted_index":{"Gain":[0],"cell":[1,30],"memories":[2],"feature":[3],"high":[4,9],"speed,":[5],"low":[6,20],"power,":[7],"and":[8,51,72,80],"density,":[10],"which":[11],"are":[12,33,54,90],"suitable":[13],"for":[14,27],"SoC":[15],"designs.":[16],"In":[17,46],"this":[18],"paper,":[19],"power":[21,49,75],"techniques":[22],"to":[23],"reduce":[24],"leakage":[25],"currents":[26],"2T1D":[28,66,79],"gain":[29],"memory":[31,37,58,67,83],"array":[32,68],"presented.":[34],"For":[35],"each":[36,57],"cell,":[38],"p-type":[39],"gated":[40],"diode":[41],"storage":[42],"device":[43],"is":[44],"applied.":[45],"addition,":[47],"footer":[48],"gating":[50],"foot":[52],"driver":[53],"applied":[55],"on":[56,92],"word.":[59],"Simulation":[60],"results":[61,89],"show":[62],"that":[63],"the":[64,87],"proposed":[65],"structure":[69],"has":[70],"97.7%":[71],"80%":[73],"standby":[74],"reduction":[76],"over":[77],"typical":[78,81],"3T1D":[82],"array,":[84],"respectively.":[85],"All":[86],"simulation":[88],"based":[91],"Predictive":[93],"Technology":[94],"Model":[95],"(PTM)":[96],"65nm":[97],"CMOS":[98],"bulk":[99],"technology.":[100]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":6},{"year":2012,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
