{"id":"https://openalex.org/W1971352894","doi":"https://doi.org/10.1109/socc.2007.4545454","title":"Mixed-VTH (MVT) CMOS circuit design for low power cell libraries","display_name":"Mixed-VTH (MVT) CMOS circuit design for low power cell libraries","publication_year":2007,"publication_date":"2007-01-01","ids":{"openalex":"https://openalex.org/W1971352894","doi":"https://doi.org/10.1109/socc.2007.4545454","mag":"1971352894"},"language":"en","primary_location":{"id":"doi:10.1109/socc.2007.4545454","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2007.4545454","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IEEE International SOC Conference","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084553995","display_name":"Jiun-Yi Lin","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Jiun-Yi Lin","raw_affiliation_strings":["Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","Department of Electronics Engineering, National Chiao Tung University, Hsin Chu, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Hsin Chu, China","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109080382","display_name":"Li-Rong Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Li-Rong Wang","raw_affiliation_strings":["Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","Department of Electronics Engineering, National Chiao Tung University, Hsin Chu, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Hsin Chu, China","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112844899","display_name":"Chia-Lin Hu","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chia-Lin Hu","raw_affiliation_strings":["Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","Department of Electronics Engineering, National Chiao Tung University, Hsin Chu, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Hsin Chu, China","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109741324","display_name":"Shyh-Jye Jou","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shyh-Jye Jou","raw_affiliation_strings":["Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","Department of Electronics Engineering, National Chiao Tung University, Hsin Chu, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Hsin Chu, China","institution_ids":["https://openalex.org/I148366613"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I148366613"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"3","issue":null,"first_page":"181","last_page":"184"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7422456741333008},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.6990545988082886},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.6134656667709351},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.6079621315002441},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5816864967346191},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.5767912864685059},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5558298826217651},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.5284485816955566},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5236896276473999},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4940400719642639},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.49094894528388977},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.47130975127220154},{"id":"https://openalex.org/keywords/low-voltage","display_name":"Low voltage","score":0.4490004777908325},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.42652827501296997},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2440720498561859},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.23276644945144653},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.09270542860031128}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7422456741333008},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.6990545988082886},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.6134656667709351},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.6079621315002441},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5816864967346191},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.5767912864685059},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5558298826217651},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.5284485816955566},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5236896276473999},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4940400719642639},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.49094894528388977},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.47130975127220154},{"id":"https://openalex.org/C128624480","wikidata":"https://www.wikidata.org/wiki/Q1504817","display_name":"Low voltage","level":3,"score":0.4490004777908325},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.42652827501296997},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2440720498561859},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.23276644945144653},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.09270542860031128},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/socc.2007.4545454","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2007.4545454","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IEEE International SOC Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1510118898","https://openalex.org/W1575022128","https://openalex.org/W1927590974","https://openalex.org/W2097466426","https://openalex.org/W2112045932","https://openalex.org/W2114621701","https://openalex.org/W2124276471","https://openalex.org/W2159745066","https://openalex.org/W6634370901","https://openalex.org/W6640438508"],"related_works":["https://openalex.org/W2585935494","https://openalex.org/W2915016853","https://openalex.org/W3115355038","https://openalex.org/W1564892798","https://openalex.org/W2538378877","https://openalex.org/W2479544731","https://openalex.org/W2524786631","https://openalex.org/W1600560344","https://openalex.org/W2136515270","https://openalex.org/W2155579514"],"abstract_inverted_index":{"Mixed-Vth":[0],"(MVT)":[1],"technique":[2],"has":[3,61],"been":[4,62],"proposed":[5],"to":[6,25,66],"resize":[7],"the":[8,59,70],"MOS":[9],"size":[10],"and":[11,45,68],"then":[12],"reduce":[13],"dynamic":[14,55],"power":[15,48,56],"in":[16,27,38],"logic":[17],"gates":[18],"by":[19],"applying":[20],"a":[21,32],"low":[22,47],"threshold":[23,34],"voltage":[24,35],"transistors":[26],"some":[28],"critical":[29],"paths,":[30],"while":[31],"standard":[33],"is":[36],"used":[37],"non-critical":[39],"paths.":[40],"This":[41],"paper":[42],"presents":[43],"130nm":[44],"90nm":[46],"cell":[49],"libraries":[50],"using":[51],"MVT":[52],"technique.":[53],"The":[54],"consumption":[57],"of":[58],"cells":[60],"reduced":[63],"around":[64],"5%":[65],"30%":[67],"with":[69],"same":[71],"timing":[72],"specifications.":[73]},"counts_by_year":[{"year":2021,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
