{"id":"https://openalex.org/W1497937320","doi":"https://doi.org/10.1109/socc.2005.1554518","title":"I Models and Tools for the Dynamic Reconfiguration of FPGAs","display_name":"I Models and Tools for the Dynamic Reconfiguration of FPGAs","publication_year":2005,"publication_date":"2005-12-13","ids":{"openalex":"https://openalex.org/W1497937320","doi":"https://doi.org/10.1109/socc.2005.1554518","mag":"1497937320"},"language":"en","primary_location":{"id":"doi:10.1109/socc.2005.1554518","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2005.1554518","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 Joint 30th International Conference on Infrared and Millimeter Waves and 13th International Conference on Terahertz Electronics","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5057297155","display_name":"Adam Donlin","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"A. Donlin","raw_affiliation_strings":["Xilinx, San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"Xilinx, San Jose, CA, USA","institution_ids":["https://openalex.org/I32923980"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024739574","display_name":"J\u00fcrgen Becker","orcid":"https://orcid.org/0000-0002-5082-5487"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"J. Becker","raw_affiliation_strings":["Laboratory for Information Processing Technology (ITIV), Universitaet Karlsruhe (TH), Karlsruhe, Germany"],"affiliations":[{"raw_affiliation_string":"Laboratory for Information Processing Technology (ITIV), Universitaet Karlsruhe (TH), Karlsruhe, Germany","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5108437484","display_name":"Michael H\u00fcbner","orcid":"https://orcid.org/0000-0003-3785-7959"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"M. Hubner","raw_affiliation_strings":["Laboratory for Information Processing Technology (ITIV), Universitaet Karlsruhe (TH), Karlsruhe, Germany"],"affiliations":[{"raw_affiliation_string":"Laboratory for Information Processing Technology (ITIV), Universitaet Karlsruhe (TH), Karlsruhe, Germany","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5057297155"],"corresponding_institution_ids":["https://openalex.org/I32923980"],"apc_list":null,"apc_paid":null,"fwci":0.2578,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.54528061,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"313","last_page":"316"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9922999739646912,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11741","display_name":"Flexible and Reconfigurable Manufacturing Systems","score":0.9919999837875366,"subfield":{"id":"https://openalex.org/subfields/2209","display_name":"Industrial and Manufacturing Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.9222354888916016},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7707697153091431},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7628604769706726},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6684521436691284},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.5929011702537537},{"id":"https://openalex.org/keywords/reconfigurability","display_name":"Reconfigurability","score":0.5573394894599915},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.46520692110061646},{"id":"https://openalex.org/keywords/component","display_name":"Component (thermodynamics)","score":0.43039610981941223},{"id":"https://openalex.org/keywords/schedule","display_name":"Schedule","score":0.4151461124420166},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10589572787284851}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.9222354888916016},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7707697153091431},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7628604769706726},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6684521436691284},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.5929011702537537},{"id":"https://openalex.org/C2780149590","wikidata":"https://www.wikidata.org/wiki/Q7302742","display_name":"Reconfigurability","level":2,"score":0.5573394894599915},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.46520692110061646},{"id":"https://openalex.org/C168167062","wikidata":"https://www.wikidata.org/wiki/Q1117970","display_name":"Component (thermodynamics)","level":2,"score":0.43039610981941223},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.4151461124420166},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10589572787284851},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/socc.2005.1554518","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2005.1554518","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 Joint 30th International Conference on Infrared and Millimeter Waves and 13th International Conference on Terahertz Electronics","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W29852052","https://openalex.org/W334497534","https://openalex.org/W1489568789","https://openalex.org/W1581744471","https://openalex.org/W2097451609","https://openalex.org/W2119501389","https://openalex.org/W2134382506","https://openalex.org/W4285719527","https://openalex.org/W6601248827","https://openalex.org/W6629274794","https://openalex.org/W6634876451"],"related_works":["https://openalex.org/W2152623100","https://openalex.org/W2096417281","https://openalex.org/W25204318","https://openalex.org/W2077035242","https://openalex.org/W2138895528","https://openalex.org/W3042643149","https://openalex.org/W1999203047","https://openalex.org/W2340647897","https://openalex.org/W2808484818","https://openalex.org/W1574948540"],"abstract_inverted_index":{"This":[0],"tutorial":[1],"outline":[2],"summarizes":[3],"the":[4,7,14,18,45,56,80,104,107,133,166,172,175],"tools":[5,33],"and":[6,25,34,126,149],"methods":[8,35],"that":[9,55,83],"are":[10,42,84],"used":[11,36,73,85],"to":[12,74,110,137],"bridge":[13],"design":[15,145,161],"gap":[16],"between":[17],"specification":[19],"of":[20,106,146],"a":[21,29,65,138,147,182],"dynamically":[22,39,88],"reconfigurable":[23,40,89,152,176],"application":[24,47,57],"its":[26],"implementation":[27],"in":[28,64,79,91,174],"FPGA":[30],"system.":[31],"The":[32,144],"when":[37],"designing":[38],"systems":[41,90],"influenced":[43],"by":[44,160,189],"target":[46],"domain.":[48],"In":[49],"this":[50],"tutorial,":[51],"it":[52],"is":[53,58,154],"assumed":[54],"an":[59],"embedded":[60],"processor":[61],"system":[62,81,108,153],"implemented":[63],"single":[66],"platform":[67],"FPGA.":[68],"Dynamic":[69],"reconfiguration":[70,130,140],"will":[71],"be":[72,179,187],"time-multiplex":[75],"mutually":[76],"exclusive":[77],"sub-components":[78],"architecture":[82,109],"periodically.":[86],"Simulating":[87],"RTL":[92,98],"simulators":[93,99],"has":[94],"been":[95],"investigated":[96],"but":[97],"normally":[100],"do":[101],"not":[102,157],"allow":[103],"topology":[105],"change":[111],"during":[112],"simulation.":[113],"'Virtual":[114],"multiplexors',":[115],"placed":[116,180],"at":[117,181],"subcomponent":[118],"I/O":[119],"interfaces,":[120],"determine":[121],"which":[122,185],"sub-component":[123],"receives":[124],"input":[125],"generates":[127],"output.":[128],"A":[129],"controller":[131],"switches":[132],"virtual":[134],"multiplexors":[135],"according":[136],"given":[139],"schedule":[141],"or":[142],"algorithm.":[143],"dynamical":[148],"partial":[150],"hardware":[151],"however":[155],"still":[156],"sufficient":[158],"supported":[159],"tools.":[162],"To":[163],"accomplish":[164],"this,":[165],"signal":[167],"lines":[168],"for":[169],"communication":[170],"with":[171],"functionality":[173],"area":[177],"must":[178],"known":[183],"position,":[184],"can":[186],"done":[188],"using":[190],"so":[191],"called":[192],"macros":[193]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
