{"id":"https://openalex.org/W1523884897","doi":"https://doi.org/10.1109/socc.2005.1554487","title":"DG-SRAM: A Low Leakage Memory Circuit","display_name":"DG-SRAM: A Low Leakage Memory Circuit","publication_year":2005,"publication_date":"2005-12-13","ids":{"openalex":"https://openalex.org/W1523884897","doi":"https://doi.org/10.1109/socc.2005.1554487","mag":"1523884897"},"language":"en","primary_location":{"id":"doi:10.1109/socc.2005.1554487","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2005.1554487","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 Joint 30th International Conference on Infrared and Millimeter Waves and 13th International Conference on Terahertz Electronics","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006585147","display_name":"Praveen Elakkumanan","orcid":null},"institutions":[{"id":"https://openalex.org/I63190737","display_name":"University at Buffalo, State University of New York","ror":"https://ror.org/01y64my43","country_code":"US","type":"education","lineage":["https://openalex.org/I63190737"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"P. Elakkumanan","raw_affiliation_strings":["Dept. of Computer Science and Engineering, University at Buffalo (SUNY), Buffalo, New York","[Department of Computer Science and Engineering, SUNY, Buffalo, NY, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Computer Science and Engineering, University at Buffalo (SUNY), Buffalo, New York","institution_ids":["https://openalex.org/I63190737"]},{"raw_affiliation_string":"[Department of Computer Science and Engineering, SUNY, Buffalo, NY, USA]","institution_ids":["https://openalex.org/I63190737"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062323772","display_name":"C. Thondapu","orcid":null},"institutions":[{"id":"https://openalex.org/I63190737","display_name":"University at Buffalo, State University of New York","ror":"https://ror.org/01y64my43","country_code":"US","type":"education","lineage":["https://openalex.org/I63190737"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"C. Thondapu","raw_affiliation_strings":["Dept. of Computer Science and Engineering, University at Buffalo (SUNY), Buffalo, New York","[Department of Computer Science and Engineering, SUNY, Buffalo, NY, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Computer Science and Engineering, University at Buffalo (SUNY), Buffalo, New York","institution_ids":["https://openalex.org/I63190737"]},{"raw_affiliation_string":"[Department of Computer Science and Engineering, SUNY, Buffalo, NY, USA]","institution_ids":["https://openalex.org/I63190737"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5080965835","display_name":"R. Sridhar","orcid":"https://orcid.org/0009-0006-8070-5511"},"institutions":[{"id":"https://openalex.org/I63190737","display_name":"University at Buffalo, State University of New York","ror":"https://ror.org/01y64my43","country_code":"US","type":"education","lineage":["https://openalex.org/I63190737"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"R. Sridhar","raw_affiliation_strings":["Dept. of Computer Science and Engineering, University at Buffalo (SUNY), Buffalo, New York","[Department of Computer Science and Engineering, SUNY, Buffalo, NY, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Computer Science and Engineering, University at Buffalo (SUNY), Buffalo, New York","institution_ids":["https://openalex.org/I63190737"]},{"raw_affiliation_string":"[Department of Computer Science and Engineering, SUNY, Buffalo, NY, USA]","institution_ids":["https://openalex.org/I63190737"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I63190737"],"apc_list":null,"apc_paid":null,"fwci":0.5402,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.58573921,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"165","last_page":"170"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/nmos-logic","display_name":"NMOS logic","score":0.8818902969360352},{"id":"https://openalex.org/keywords/pmos-logic","display_name":"PMOS logic","score":0.7936153411865234},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7767593860626221},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.7705683708190918},{"id":"https://openalex.org/keywords/subthreshold-conduction","display_name":"Subthreshold conduction","score":0.7119817137718201},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.6322482228279114},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.5298041105270386},{"id":"https://openalex.org/keywords/gate-oxide","display_name":"Gate oxide","score":0.5056579113006592},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.46372124552726746},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4346047043800354},{"id":"https://openalex.org/keywords/mosfet","display_name":"MOSFET","score":0.4197292625904083},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.40254396200180054},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.39811962842941284},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.28819313645362854},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2552992105484009}],"concepts":[{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.8818902969360352},{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.7936153411865234},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7767593860626221},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.7705683708190918},{"id":"https://openalex.org/C156465305","wikidata":"https://www.wikidata.org/wiki/Q1658601","display_name":"Subthreshold conduction","level":4,"score":0.7119817137718201},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.6322482228279114},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.5298041105270386},{"id":"https://openalex.org/C2361726","wikidata":"https://www.wikidata.org/wiki/Q5527031","display_name":"Gate oxide","level":4,"score":0.5056579113006592},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.46372124552726746},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4346047043800354},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.4197292625904083},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.40254396200180054},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.39811962842941284},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.28819313645362854},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2552992105484009},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/socc.2005.1554487","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2005.1554487","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 Joint 30th International Conference on Infrared and Millimeter Waves and 13th International Conference on Terahertz Electronics","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8899999856948853}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1543643719","https://openalex.org/W1661368752","https://openalex.org/W1934231135","https://openalex.org/W2094662129","https://openalex.org/W2096362780","https://openalex.org/W2131054871","https://openalex.org/W2168101540","https://openalex.org/W2536812073","https://openalex.org/W2546351422","https://openalex.org/W4248310916","https://openalex.org/W6728927841"],"related_works":["https://openalex.org/W4386261925","https://openalex.org/W2048420745","https://openalex.org/W2082944690","https://openalex.org/W2263373136","https://openalex.org/W1914349328","https://openalex.org/W2160067645","https://openalex.org/W2023334077","https://openalex.org/W2005494397","https://openalex.org/W2104885411","https://openalex.org/W2918058197"],"abstract_inverted_index":{"The":[0],"gate":[1,13,29,55,80,115],"oxide":[2,103],"thickness":[3,104],"in":[4,22,38,42,82,139],"sub-70nm":[5],"process":[6,96],"technologies":[7],"approaches":[8],"the":[9,34,54,79,114,128],"limit":[10],"where":[11],"direct":[12],"tunneling":[14],"current":[15,31],"starts":[16],"to":[17,77,127],"play":[18],"a":[19,39,65,108],"significant":[20,137],"role":[21],"both":[23],"off-state":[24],"and":[25,88,117,135],"on-state":[26],"transistors.":[27],"This":[28],"leakage":[30,44,56,81,116,121],"coupled":[32],"with":[33,131],"subthreshold":[35],"leakage,":[36],"results":[37,93],"dramatic":[40],"increase":[41],"total":[43,120],"power.":[45],"Hence,":[46],"efficient":[47],"power":[48],"reduction":[49,109],"strategies":[50],"that":[51,69],"directly":[52],"address":[53],"component":[57],"are":[58],"necessary.":[59],"In":[60],"this":[61],"paper,":[62],"we":[63],"present":[64],"diode-gated":[66],"SRAM":[67],"(DG-SRAM)":[68],"uses":[70],"two":[71],"additional":[72],"NMOS":[73],"(or":[74],"PMOS)":[75],"transistors":[76],"decrease":[78],"very":[83],"deep":[84],"sub-micron":[85],"(VDSM)":[86],"cache":[87],"embedded":[89],"memories.":[90],"Our":[91],"simulation":[92],"on":[94],"65nm":[95],"(Berkeley":[97],"Predictive":[98],"Technology":[99],"Model)":[100],"for":[101,122],"an":[102],"of":[105,110,113,119],"1.5nm":[106],"indicate":[107],"about":[111],"69%":[112],"65%":[118],"NMOS-connected":[123],"DG-SRAM":[124],"as":[125],"compared":[126],"conventional":[129],"SRAM,":[130],"minimal":[132],"area":[133],"overhead":[134],"no":[136],"loss":[138],"performance":[140],"or":[141],"stability.":[142]},"counts_by_year":[{"year":2019,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}