{"id":"https://openalex.org/W1598653746","doi":"https://doi.org/10.1109/socc.2005.1554478","title":"Simultaneous memory and bus partitioning for SoC architectures","display_name":"Simultaneous memory and bus partitioning for SoC architectures","publication_year":2005,"publication_date":"2005-01-01","ids":{"openalex":"https://openalex.org/W1598653746","doi":"https://doi.org/10.1109/socc.2005.1554478","mag":"1598653746"},"language":"en","primary_location":{"id":"doi:10.1109/socc.2005.1554478","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2005.1554478","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 2005 IEEE International SOC Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5078427610","display_name":"Suresh Srinivasan","orcid":"https://orcid.org/0000-0002-0228-8795"},"institutions":[{"id":"https://openalex.org/I130769515","display_name":"Pennsylvania State University","ror":"https://ror.org/04p491231","country_code":"US","type":"education","lineage":["https://openalex.org/I130769515"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"S. Srinivasan","raw_affiliation_strings":["Dept. of Comput. Sci. & Eng., Pennsylvania State Univ., University Park, PA, USA","Depatment Of Computer Science and Engineering, Pennsylvania State University, PA, USA"],"affiliations":[{"raw_affiliation_string":"Dept. of Comput. Sci. & Eng., Pennsylvania State Univ., University Park, PA, USA","institution_ids":["https://openalex.org/I130769515"]},{"raw_affiliation_string":"Depatment Of Computer Science and Engineering, Pennsylvania State University, PA, USA","institution_ids":["https://openalex.org/I130769515"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091526399","display_name":"Federico Angiolini","orcid":null},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"F. Angiolini","raw_affiliation_strings":["DELS, University of Bologna, Bologna, Italy"],"affiliations":[{"raw_affiliation_string":"DELS, University of Bologna, Bologna, Italy","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062549550","display_name":"Martino Ruggiero","orcid":null},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"M. Ruggiero","raw_affiliation_strings":["DELS, University of Bologna, Bologna, Italy"],"affiliations":[{"raw_affiliation_string":"DELS, University of Bologna, Bologna, Italy","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043408422","display_name":"Luca Benini","orcid":"https://orcid.org/0000-0001-8068-3806"},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"L. Benini","raw_affiliation_strings":["DELS, University of Bologna, Bologna, Italy"],"affiliations":[{"raw_affiliation_string":"DELS, University of Bologna, Bologna, Italy","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5039645408","display_name":"N. Vijaykrishnan","orcid":null},"institutions":[{"id":"https://openalex.org/I130769515","display_name":"Pennsylvania State University","ror":"https://ror.org/04p491231","country_code":"US","type":"education","lineage":["https://openalex.org/I130769515"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"N. Vijaykrishnan","raw_affiliation_strings":["Depatment Of Computer Science and Engineering, Pennsylvania State University, PA"],"affiliations":[{"raw_affiliation_string":"Depatment Of Computer Science and Engineering, Pennsylvania State University, PA","institution_ids":["https://openalex.org/I130769515"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5078427610"],"corresponding_institution_ids":["https://openalex.org/I130769515"],"apc_list":null,"apc_paid":null,"fwci":1.5838,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.83321315,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"125","last_page":"128"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.774639368057251},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.6524699926376343},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6478314995765686},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.6122501492500305},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.4644477665424347},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.43992358446121216},{"id":"https://openalex.org/keywords/system-bus","display_name":"System bus","score":0.4298818111419678},{"id":"https://openalex.org/keywords/constraint","display_name":"Constraint (computer-aided design)","score":0.4275318682193756},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4119469225406647},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3676173985004425},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3564937114715576},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3427794873714447},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.21864935755729675},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1370958387851715}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.774639368057251},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.6524699926376343},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6478314995765686},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.6122501492500305},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.4644477665424347},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.43992358446121216},{"id":"https://openalex.org/C136321198","wikidata":"https://www.wikidata.org/wiki/Q2377054","display_name":"System bus","level":2,"score":0.4298818111419678},{"id":"https://openalex.org/C2776036281","wikidata":"https://www.wikidata.org/wiki/Q48769818","display_name":"Constraint (computer-aided design)","level":2,"score":0.4275318682193756},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4119469225406647},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3676173985004425},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3564937114715576},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3427794873714447},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.21864935755729675},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1370958387851715},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/socc.2005.1554478","is_oa":false,"landing_page_url":"https://doi.org/10.1109/socc.2005.1554478","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 2005 IEEE International SOC Conference","raw_type":"proceedings-article"},{"id":"pmh:oai:cris.unibo.it:11585/14714","is_oa":false,"landing_page_url":"http://hdl.handle.net/11585/14714","pdf_url":null,"source":{"id":"https://openalex.org/S4306402579","display_name":"Archivio istituzionale della ricerca (Alma Mater Studiorum Universit\u00e0 di Bologna)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4210117483","host_organization_name":"Istituto di Ematologia di Bologna","host_organization_lineage":["https://openalex.org/I4210117483"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.9100000262260437}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1639032689","https://openalex.org/W1989068738","https://openalex.org/W2034928524","https://openalex.org/W2078622522","https://openalex.org/W2111919017","https://openalex.org/W2119729783","https://openalex.org/W2120429086","https://openalex.org/W2134464591","https://openalex.org/W2141478891","https://openalex.org/W2147554638","https://openalex.org/W2152150600","https://openalex.org/W2159247054","https://openalex.org/W2171248969","https://openalex.org/W3023540311","https://openalex.org/W4233972132","https://openalex.org/W4252879211","https://openalex.org/W6636850861","https://openalex.org/W6658813008","https://openalex.org/W6677892417","https://openalex.org/W6682075503"],"related_works":["https://openalex.org/W2041727145","https://openalex.org/W1989716137","https://openalex.org/W2106652079","https://openalex.org/W1578470521","https://openalex.org/W2168402908","https://openalex.org/W4382130817","https://openalex.org/W1979890836","https://openalex.org/W2382679704","https://openalex.org/W2084135352","https://openalex.org/W2136581463"],"abstract_inverted_index":{"There":[0],"has":[1],"been":[2],"a":[3,28,65,69,77,91,96],"continued":[4],"proliferation":[5],"in":[6,16,128],"the":[7,17,21,32,46,61,85,88,106,115],"demand":[8],"for":[9,31,59,95],"application":[10],"specific":[11],"system":[12,78],"on":[13],"chip":[14],"cores":[15],"recent":[18],"years.":[19],"Meeting":[20],"power":[22],"budget":[23],"constraint":[24],"continues":[25],"to":[26,75],"be":[27,55],"major":[29],"challenge":[30],"designers":[33],"architecting":[34],"such":[35],"systems.":[36],"In":[37],"this":[38],"work,":[39],"we":[40],"demonstrate":[41],"that":[42,80,105],"simultaneous":[43],"partitioning":[44,123],"of":[45,64,87,117],"bus":[47,120],"and":[48,83,113,121],"memory":[49,122],"subsystem":[50],"into":[51],"smaller":[52],"segments":[53],"can":[54],"an":[56],"effective":[57],"mechanism":[58,74],"reducing":[60],"energy":[62,111],"consumption":[63],"SoC.":[66,98],"We":[67],"present":[68],"genetic":[70],"algorithm":[71],"based":[72],"search":[73],"determine":[76],"configuration":[79,89],"is":[81],"energy-efficient":[82],"validate":[84],"effectiveness":[86],"using":[90,101],"cycle-accurate":[92],"virtual":[93],"platform":[94],"multiprocessor":[97],"Our":[99],"results":[100],"various":[102],"applications":[103],"show":[104],"proposed":[107,119],"approach":[108],"gives":[109],"significant":[110],"savings":[112],"accentuates":[114],"benefits":[116],"previously":[118],"schemes":[124],"applied":[125],"individually":[126],"or":[127],"combination.":[129]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2026-04-09T06:08:40.794217","created_date":"2025-10-10T00:00:00"}