{"id":"https://openalex.org/W7125932511","doi":"https://doi.org/10.1109/smc58881.2025.11342471","title":"Adaptive Decision Feedback Equalization for High-Speed Serializer/Deserializer Communication System","display_name":"Adaptive Decision Feedback Equalization for High-Speed Serializer/Deserializer Communication System","publication_year":2025,"publication_date":"2025-10-05","ids":{"openalex":"https://openalex.org/W7125932511","doi":"https://doi.org/10.1109/smc58881.2025.11342471"},"language":null,"primary_location":{"id":"doi:10.1109/smc58881.2025.11342471","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smc58881.2025.11342471","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Conference on Systems, Man, and Cybernetics (SMC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5124096355","display_name":"Guo-Ming Sung","orcid":null},"institutions":[{"id":"https://openalex.org/I118292597","display_name":"National Taipei University of Technology","ror":"https://ror.org/00cn92c09","country_code":"TW","type":"education","lineage":["https://openalex.org/I118292597"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Guo-Ming Sung","raw_affiliation_strings":["National Taipei University of Technology,Taipei,Taiwan,10608"],"affiliations":[{"raw_affiliation_string":"National Taipei University of Technology,Taipei,Taiwan,10608","institution_ids":["https://openalex.org/I118292597"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5116020951","display_name":"Sachin D. Kohale","orcid":"https://orcid.org/0009-0004-1747-6344"},"institutions":[{"id":"https://openalex.org/I118292597","display_name":"National Taipei University of Technology","ror":"https://ror.org/00cn92c09","country_code":"TW","type":"education","lineage":["https://openalex.org/I118292597"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Sachin D. Kohale","raw_affiliation_strings":["National Taipei University of Technology,Taipei,Taiwan,10608"],"affiliations":[{"raw_affiliation_string":"National Taipei University of Technology,Taipei,Taiwan,10608","institution_ids":["https://openalex.org/I118292597"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5124101346","display_name":"Shu-Wen Chang","orcid":null},"institutions":[{"id":"https://openalex.org/I118292597","display_name":"National Taipei University of Technology","ror":"https://ror.org/00cn92c09","country_code":"TW","type":"education","lineage":["https://openalex.org/I118292597"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shu-Wen Chang","raw_affiliation_strings":["National Taipei University of Technology,Taipei,Taiwan,10608"],"affiliations":[{"raw_affiliation_string":"National Taipei University of Technology,Taipei,Taiwan,10608","institution_ids":["https://openalex.org/I118292597"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025103245","display_name":"Li-Fen Tung","orcid":null},"institutions":[{"id":"https://openalex.org/I118292597","display_name":"National Taipei University of Technology","ror":"https://ror.org/00cn92c09","country_code":"TW","type":"education","lineage":["https://openalex.org/I118292597"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Li-Fen Tung","raw_affiliation_strings":["National Taipei University of Technology,Taipei,Taiwan,10608"],"affiliations":[{"raw_affiliation_string":"National Taipei University of Technology,Taipei,Taiwan,10608","institution_ids":["https://openalex.org/I118292597"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070299378","display_name":"Chwan-Lu Tseng","orcid":null},"institutions":[{"id":"https://openalex.org/I118292597","display_name":"National Taipei University of Technology","ror":"https://ror.org/00cn92c09","country_code":"TW","type":"education","lineage":["https://openalex.org/I118292597"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chwan-Lu Tseng","raw_affiliation_strings":["National Taipei University of Technology,Taipei,Taiwan,10608"],"affiliations":[{"raw_affiliation_string":"National Taipei University of Technology,Taipei,Taiwan,10608","institution_ids":["https://openalex.org/I118292597"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5124071633","display_name":"Jen-Hsiang Chou","orcid":null},"institutions":[{"id":"https://openalex.org/I118292597","display_name":"National Taipei University of Technology","ror":"https://ror.org/00cn92c09","country_code":"TW","type":"education","lineage":["https://openalex.org/I118292597"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Jen-Hsiang Chou","raw_affiliation_strings":["National Taipei University of Technology,Taipei,Taiwan,10608"],"affiliations":[{"raw_affiliation_string":"National Taipei University of Technology,Taipei,Taiwan,10608","institution_ids":["https://openalex.org/I118292597"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5124096355"],"corresponding_institution_ids":["https://openalex.org/I118292597"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.61154793,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"3753","last_page":"3758"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.6635000109672546,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.6635000109672546,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.19249999523162842,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.021299999207258224,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adaptive-equalizer","display_name":"Adaptive equalizer","score":0.7480999827384949},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.5666000247001648},{"id":"https://openalex.org/keywords/equalizer","display_name":"Equalizer","score":0.5608000159263611},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5482000112533569},{"id":"https://openalex.org/keywords/communications-system","display_name":"Communications system","score":0.49219998717308044},{"id":"https://openalex.org/keywords/equalization","display_name":"Equalization (audio)","score":0.4546999931335449},{"id":"https://openalex.org/keywords/interference","display_name":"Interference (communication)","score":0.4205999970436096},{"id":"https://openalex.org/keywords/bit-error-rate","display_name":"Bit error rate","score":0.4129999876022339},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.4088999927043915}],"concepts":[{"id":"https://openalex.org/C25125847","wikidata":"https://www.wikidata.org/wiki/Q4680741","display_name":"Adaptive equalizer","level":4,"score":0.7480999827384949},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6118000149726868},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6013000011444092},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.5666000247001648},{"id":"https://openalex.org/C67545415","wikidata":"https://www.wikidata.org/wiki/Q5384218","display_name":"Equalizer","level":3,"score":0.5608000159263611},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5482000112533569},{"id":"https://openalex.org/C101765175","wikidata":"https://www.wikidata.org/wiki/Q577764","display_name":"Communications system","level":2,"score":0.49219998717308044},{"id":"https://openalex.org/C75755367","wikidata":"https://www.wikidata.org/wiki/Q104531076","display_name":"Equalization (audio)","level":3,"score":0.4546999931335449},{"id":"https://openalex.org/C32022120","wikidata":"https://www.wikidata.org/wiki/Q797225","display_name":"Interference (communication)","level":3,"score":0.4205999970436096},{"id":"https://openalex.org/C56296756","wikidata":"https://www.wikidata.org/wiki/Q840922","display_name":"Bit error rate","level":3,"score":0.4129999876022339},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.4088999927043915},{"id":"https://openalex.org/C97812054","wikidata":"https://www.wikidata.org/wiki/Q2166055","display_name":"Intersymbol interference","level":3,"score":0.39750000834465027},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.38960000872612},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.35690000653266907},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3538999855518341},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.33709999918937683},{"id":"https://openalex.org/C83204339","wikidata":"https://www.wikidata.org/wiki/Q7523915","display_name":"Single antenna interference cancellation","level":3,"score":0.3181999921798706},{"id":"https://openalex.org/C102248274","wikidata":"https://www.wikidata.org/wiki/Q168388","display_name":"Adaptive filter","level":2,"score":0.3052999973297119},{"id":"https://openalex.org/C123079801","wikidata":"https://www.wikidata.org/wiki/Q750240","display_name":"Modulation (music)","level":2,"score":0.29829999804496765},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.29649999737739563},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2946999967098236},{"id":"https://openalex.org/C126780896","wikidata":"https://www.wikidata.org/wiki/Q899871","display_name":"Distortion (music)","level":4,"score":0.2896000146865845},{"id":"https://openalex.org/C186886427","wikidata":"https://www.wikidata.org/wiki/Q5441213","display_name":"Feedback loop","level":2,"score":0.28760001063346863},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.2851000130176544},{"id":"https://openalex.org/C105344744","wikidata":"https://www.wikidata.org/wiki/Q958957","display_name":"Spread spectrum","level":3,"score":0.2808000147342682},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.2802000045776367},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.27410000562667847},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.27140000462532043},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.2676999866962433},{"id":"https://openalex.org/C52970973","wikidata":"https://www.wikidata.org/wiki/Q2497134","display_name":"Adaptive system","level":2,"score":0.2655999958515167},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2529999911785126}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/smc58881.2025.11342471","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smc58881.2025.11342471","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Conference on Systems, Man, and Cybernetics (SMC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320331164","display_name":"National Science and Technology Council","ror":"https://ror.org/00wnb9798"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1895942060","https://openalex.org/W1993531448","https://openalex.org/W2009468193","https://openalex.org/W2076969796","https://openalex.org/W2115802868","https://openalex.org/W2137131886","https://openalex.org/W2147066935","https://openalex.org/W2161843553","https://openalex.org/W2783166731","https://openalex.org/W3165649231"],"related_works":[],"abstract_inverted_index":{"An":[0],"8-tap":[1],"feed-forward":[2],"equalizer":[3,9,77],"(FFE)":[4],"and":[5,61,66,68,88,103,136,154,167,175,185],"10-tap":[6],"decision":[7],"feedback":[8],"(DFE)":[10],"were":[11,158,182],"designed":[12,48,129],"for":[13,40,63,70,80],"the":[14,35,38,45,51,64,71,76,139,149,178],"IEEE":[15],"802.3u":[16],"100Base-TX":[17],"specification.":[18],"The":[19,123,172],"weights":[20],"of":[21,37,53,83,95,177],"these":[22],"adaptive":[23,180],"filters":[24],"are":[25,47],"updated":[26],"with":[27,138],"a":[28,91],"sign\u2013sign":[29],"least-mean-square":[30],"(SSLMS)":[31],"algorithm.":[32],"To":[33],"ensure":[34],"flexibility":[36],"circuits":[39],"various":[41],"environments":[42],"channel":[43,81],"lengths,":[44],"equalizers":[46],"such":[49],"that":[50,75],"number":[52],"taps":[54],"can":[55,78],"be":[56],"adjusted":[57],"to":[58],"between":[59],"1":[60,67],"8":[62],"FFE":[65,102],"10":[69],"DFE.":[72],"Results":[73],"indicated":[74],"compensate":[79],"delays":[82],"more":[84],"than":[85],"20":[86],"dB,":[87],"it":[89],"achieved":[90],"bit":[92],"error":[93],"rate":[94],"2":[96],"\u00d7":[97,160],"10<sup":[98],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[99,163],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">\u22123</sup>.":[100],"Both":[101],"DFE":[104,181],"not":[105],"only":[106],"mitigate":[107],"signal":[108],"distortion":[109],"but":[110],"also":[111],"significantly":[112],"eliminate":[113],"inter-symbol":[114],"interference":[115],"(ISI)":[116],"in":[117],"high-speed":[118],"serializer/deserializer":[119],"(SerDes)":[120],"communication":[121],"systems.":[122],"application-specific":[124],"integrated":[125],"circuit":[126],"(ASIC)":[127],"was":[128],"using":[130],"Verilog":[131],"Hardware":[132],"Description":[133],"Language":[134],"(HDL)":[135],"implemented":[137],"TSMC":[140],"90-nm":[141],"CMOS":[142],"1P9M":[143],"standard":[144],"cell":[145],"process.":[146],"In":[147],"simulations,":[148],"chip":[150],"area,":[151],"delay":[152],"cycle,":[153],"logic":[155],"gate":[156],"counts":[157],"845.445":[159,161],"\u03bcm<sup":[162],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>,":[164],"12":[165],"cycles,":[166],"75":[168],"187":[169],"gates,":[170],"respectively.":[171,188],"supplied":[173],"voltage":[174],"frequency":[176],"proposed":[179],"1.2":[183],"V":[184],"250":[186],"MHz,":[187]},"counts_by_year":[],"updated_date":"2026-04-09T08:11:56.329763","created_date":"2026-01-29T00:00:00"}