{"id":"https://openalex.org/W4413096101","doi":"https://doi.org/10.1109/smacd65553.2025.11092083","title":"Characterization of Inter-Chip Interconnects Using Piecewise Effective Capacitance","display_name":"Characterization of Inter-Chip Interconnects Using Piecewise Effective Capacitance","publication_year":2025,"publication_date":"2025-07-07","ids":{"openalex":"https://openalex.org/W4413096101","doi":"https://doi.org/10.1109/smacd65553.2025.11092083"},"language":"en","primary_location":{"id":"doi:10.1109/smacd65553.2025.11092083","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd65553.2025.11092083","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design (SMACD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111186557","display_name":"Nilotpal Sarma","orcid":null},"institutions":[{"id":"https://openalex.org/I154851008","display_name":"Indian Institute of Technology Roorkee","ror":"https://ror.org/00582g326","country_code":"IN","type":"education","lineage":["https://openalex.org/I154851008"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Nilotpal Sarma","raw_affiliation_strings":["Indian Institute of Technology,Department of Electronics and Communication Engineering,Roorkee,India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology,Department of Electronics and Communication Engineering,Roorkee,India","institution_ids":["https://openalex.org/I154851008"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081551103","display_name":"Ashutosh Yadav","orcid":"https://orcid.org/0000-0003-4547-224X"},"institutions":[{"id":"https://openalex.org/I154851008","display_name":"Indian Institute of Technology Roorkee","ror":"https://ror.org/00582g326","country_code":"IN","type":"education","lineage":["https://openalex.org/I154851008"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Ashutosh Yadav","raw_affiliation_strings":["Indian Institute of Technology,Department of Electronics and Communication Engineering,Roorkee,India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology,Department of Electronics and Communication Engineering,Roorkee,India","institution_ids":["https://openalex.org/I154851008"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064560509","display_name":"Sudeb Dasgupta","orcid":"https://orcid.org/0000-0002-4044-1594"},"institutions":[{"id":"https://openalex.org/I154851008","display_name":"Indian Institute of Technology Roorkee","ror":"https://ror.org/00582g326","country_code":"IN","type":"education","lineage":["https://openalex.org/I154851008"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sudeb Dasgupta","raw_affiliation_strings":["Indian Institute of Technology,Department of Electronics and Communication Engineering,Roorkee,India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology,Department of Electronics and Communication Engineering,Roorkee,India","institution_ids":["https://openalex.org/I154851008"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5031850929","display_name":"Anand Bulusu","orcid":"https://orcid.org/0000-0002-3986-3730"},"institutions":[{"id":"https://openalex.org/I154851008","display_name":"Indian Institute of Technology Roorkee","ror":"https://ror.org/00582g326","country_code":"IN","type":"education","lineage":["https://openalex.org/I154851008"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Anand Bulusu","raw_affiliation_strings":["Indian Institute of Technology,Department of Electronics and Communication Engineering,Roorkee,India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology,Department of Electronics and Communication Engineering,Roorkee,India","institution_ids":["https://openalex.org/I154851008"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5111186557"],"corresponding_institution_ids":["https://openalex.org/I154851008"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.231392,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.8384706377983093},{"id":"https://openalex.org/keywords/characterization","display_name":"Characterization (materials science)","score":0.6246996521949768},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.617511510848999},{"id":"https://openalex.org/keywords/piecewise","display_name":"Piecewise","score":0.5501669645309448},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4754338264465332},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.45906737446784973},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.45282065868377686},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.3528073728084564},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.3220485746860504},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.21041926741600037},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1704614758491516},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12685680389404297},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.10617810487747192},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.10583901405334473},{"id":"https://openalex.org/keywords/electrode","display_name":"Electrode","score":0.09236147999763489},{"id":"https://openalex.org/keywords/nanotechnology","display_name":"Nanotechnology","score":0.08459305763244629}],"concepts":[{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.8384706377983093},{"id":"https://openalex.org/C2780841128","wikidata":"https://www.wikidata.org/wiki/Q5073781","display_name":"Characterization (materials science)","level":2,"score":0.6246996521949768},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.617511510848999},{"id":"https://openalex.org/C164660894","wikidata":"https://www.wikidata.org/wiki/Q2037833","display_name":"Piecewise","level":2,"score":0.5501669645309448},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4754338264465332},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.45906737446784973},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.45282065868377686},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.3528073728084564},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.3220485746860504},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.21041926741600037},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1704614758491516},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12685680389404297},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.10617810487747192},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.10583901405334473},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.09236147999763489},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.08459305763244629},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/smacd65553.2025.11092083","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd65553.2025.11092083","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design (SMACD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.41999998688697815,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2096760049","https://openalex.org/W2142434074","https://openalex.org/W2161164811","https://openalex.org/W2186373062","https://openalex.org/W2735418810","https://openalex.org/W3137237606","https://openalex.org/W4396949013","https://openalex.org/W6675495040"],"related_works":["https://openalex.org/W3107994849","https://openalex.org/W4247143848","https://openalex.org/W2009883749","https://openalex.org/W2735573198","https://openalex.org/W29442446","https://openalex.org/W2347585086","https://openalex.org/W2065289416","https://openalex.org/W2017236304","https://openalex.org/W2115579119","https://openalex.org/W2136854845"],"abstract_inverted_index":{"The":[0,111,182],"semiconductor":[1],"industry":[2],"is":[3,115],"increasingly":[4],"adopting":[5],"multi-die":[6,158],"technologies,":[7],"such":[8],"as":[9],"2.5D":[10],"and":[11,19,41,61,79,90,98,128,150,175],"3D":[12],"IC":[13],"structures,":[14],"which":[15,36],"utilize":[16],"both":[17,95],"lateral":[18],"vertical":[20],"interconnects.":[21,164],"These":[22],"inter-die":[23,103,163],"interconnects":[24],"behave":[25],"similarly":[26],"to":[27,43,59],"traditional":[28],"intra-die":[29],"interconnects;":[30],"however,":[31],"they":[32],"are":[33],"generally":[34],"larger,":[35],"causes":[37],"their":[38],"parasitic":[39],"resistance":[40],"inductance":[42],"become":[44],"significant":[45],"factors.":[46],"This,":[47],"in":[48,64,200],"turn,":[49],"impacts":[50],"its":[51,108],"input":[52],"effective":[53],"capacitance":[54],"(C<inf":[55],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[56,88,113,135],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">eff</inf>),":[57],"leading":[58],"delays":[60],"waveform":[62,192],"distortion":[63],"the":[65,91,96,123,126,173,176],"signals":[66],"that":[67,160],"propagate":[68],"through":[69],"them.":[70],"In":[71,130],"this":[72,132],"work,":[73],"we":[74],"present":[75],"a":[76,170,195,201],"simple,":[77],"intuitive,":[78],"widely":[80],"applicable":[81],"closed-form":[82],"analytical":[83],"model":[84],"for":[85,147,157],"estimating":[86],"C<inf":[87,112,134],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">eff</inf>":[89,114,136],"resulting":[92],"waveforms":[93],"at":[94],"driving":[97],"receiving":[99],"ends":[100],"of":[101,107,125,172,198],"long":[102,162],"interconnects,":[104],"considering":[105],"all":[106],"RLC":[109],"components.":[110],"modelled":[116],"piecewise,":[117],"with":[118,188,194],"well-defined":[119],"boundaries":[120],"based":[121],"on":[122],"characteristics":[124],"driver":[127],"interconnect.":[129],"future,":[131],"piecewise":[133],"approach":[137,168],"could":[138,151],"be":[139],"integrated":[140],"into":[141],"static":[142],"timing":[143,148],"analysis":[144,149],"(STA)":[145],"engines":[146],"support":[152],"optimized":[153],"buffer":[154],"design":[155],"methodologies":[156],"systems":[159],"include":[161],"We":[165],"evaluate":[166],"our":[167],"using":[169,178],"\u03c0-model":[171],"interconnect":[174],"validated":[177],"TSMC":[179],"64nm":[180],"PDK.":[181],"proposed":[183],"method":[184],"demonstrates":[185],"strong":[186],"agreement":[187],"SPICE":[189],"results":[190],"regarding":[191],"matching,":[193],"maximum":[196],"error":[197],"4%":[199],"few":[202],"scenarios.":[203]},"counts_by_year":[],"updated_date":"2025-12-28T23:10:05.387466","created_date":"2025-10-10T00:00:00"}