{"id":"https://openalex.org/W4413096219","doi":"https://doi.org/10.1109/smacd65553.2025.11091885","title":"Implementation of a Linear LN-TIA with PMOS Resistors in a T-network Configuration","display_name":"Implementation of a Linear LN-TIA with PMOS Resistors in a T-network Configuration","publication_year":2025,"publication_date":"2025-07-07","ids":{"openalex":"https://openalex.org/W4413096219","doi":"https://doi.org/10.1109/smacd65553.2025.11091885"},"language":"en","primary_location":{"id":"doi:10.1109/smacd65553.2025.11091885","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd65553.2025.11091885","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design (SMACD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103057140","display_name":"Hakan \u00c7etinkaya","orcid":"https://orcid.org/0000-0002-1466-5930"},"institutions":[{"id":"https://openalex.org/I2799978770","display_name":"X-Fab (Germany)","ror":"https://ror.org/030bh9196","country_code":"DE","type":"company","lineage":["https://openalex.org/I2799978770"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Hakan \u00c7etinkaya","raw_affiliation_strings":["Y&#x0130;TAL B&#x0130;LGEM T&#x00DC;B&#x0130;TAK,Turkey"],"affiliations":[{"raw_affiliation_string":"Y&#x0130;TAL B&#x0130;LGEM T&#x00DC;B&#x0130;TAK,Turkey","institution_ids":["https://openalex.org/I2799978770"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5011004679","display_name":"Yasin Talay","orcid":null},"institutions":[{"id":"https://openalex.org/I1304132090","display_name":"Sony (Taiwan)","ror":"https://ror.org/0214y7014","country_code":"TW","type":"company","lineage":["https://openalex.org/I1304132090","https://openalex.org/I4210143797"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yasin Talay","raw_affiliation_strings":["SONY EUROPE,Oslo,Norway"],"affiliations":[{"raw_affiliation_string":"SONY EUROPE,Oslo,Norway","institution_ids":["https://openalex.org/I1304132090"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5103057140"],"corresponding_institution_ids":["https://openalex.org/I2799978770"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.23285624,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/pmos-logic","display_name":"PMOS logic","score":0.9165939092636108},{"id":"https://openalex.org/keywords/resistor","display_name":"Resistor","score":0.8402661085128784},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.46050330996513367},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3129100203514099},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24373334646224976},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.15499302744865417},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.103325754404068}],"concepts":[{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.9165939092636108},{"id":"https://openalex.org/C137488568","wikidata":"https://www.wikidata.org/wiki/Q5321","display_name":"Resistor","level":3,"score":0.8402661085128784},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.46050330996513367},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3129100203514099},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24373334646224976},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.15499302744865417},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.103325754404068}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/smacd65553.2025.11091885","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd65553.2025.11091885","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design (SMACD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.800000011920929,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2052379009","https://openalex.org/W2131225173","https://openalex.org/W2989922051","https://openalex.org/W3008212765","https://openalex.org/W4390693282"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W2095795001","https://openalex.org/W2465290883","https://openalex.org/W2003063789","https://openalex.org/W2035078432","https://openalex.org/W1970620885","https://openalex.org/W2023334077","https://openalex.org/W3119249758"],"abstract_inverted_index":{"This":[0],"paper":[1],"introduces":[2],"the":[3,6,14,18,52,68,116],"measurement":[4],"of":[5,17,102,123],"previously":[7],"published":[8],"low-noise":[9],"transimpedance":[10,87],"amplifier":[11],"(LN-TIA1)":[12],"and":[13,43,96],"simulation":[15],"results":[16],"LN-TIA2":[19,39,60],"with":[20],"improved":[21],"linearity.":[22],"Both":[23],"LN-TIAs":[24],"are":[25],"based":[26],"on":[27],"a":[28,41,86,99,110,120],"T-network":[29],"feedback":[30],"architecture":[31],"that":[32,67],"incorporates":[33],"tunable":[34],"PMOS":[35],"resistors.":[36],"The":[37,59],"proposed":[38],"achieves":[40,85],"linearity":[42],"dynamic":[44,64],"range":[45,65,101],"enhancement":[46],"exceeding":[47],"+30":[48],"dB,":[49],"without":[50],"compromising":[51],"noise":[53],"floor":[54],"performance":[55],"at":[56],"18":[57,106],"kHz.":[58,107],"performs":[61],"wide":[62],"output":[63,71],"so":[66],"differential":[69],"peak-to-peak":[70],"voltage":[72],"can":[73],"reach":[74],"up":[75],"to":[76,80,93,105],"8":[77],"V,":[78],"corresponding":[79],"63":[81],"dB":[82],"SNDR.":[83],"It":[84],"gain":[88],"ranging":[89],"from":[90],"100":[91,103],"k\u03a9":[92],"125":[94],"M\u03a9":[95],"operates":[97],"across":[98],"frequency":[100],"Hz":[104],"Implemented":[108],"in":[109],"0.7":[111],"\u03bcm,":[112],"2-metal":[113],"CMOS":[114],"process,":[115],"overall":[117],"chip":[118],"occupies":[119],"silicon":[121],"area":[122],"1170":[124],"\u03bcm":[125],"\u00d7":[126],"1332":[127],"\u03bcm.":[128]},"counts_by_year":[],"updated_date":"2025-12-28T23:10:05.387466","created_date":"2025-10-10T00:00:00"}
