{"id":"https://openalex.org/W4404239221","doi":"https://doi.org/10.1109/smacd61181.2024.10745438","title":"Two Stage Diode-String Architecture for Ultra-Low Power Digital to Analog Converters","display_name":"Two Stage Diode-String Architecture for Ultra-Low Power Digital to Analog Converters","publication_year":2024,"publication_date":"2024-07-02","ids":{"openalex":"https://openalex.org/W4404239221","doi":"https://doi.org/10.1109/smacd61181.2024.10745438"},"language":"en","primary_location":{"id":"doi:10.1109/smacd61181.2024.10745438","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd61181.2024.10745438","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5058086559","display_name":"Andreas Tsiougkos","orcid":"https://orcid.org/0000-0003-0791-4449"},"institutions":[{"id":"https://openalex.org/I21370196","display_name":"Aristotle University of Thessaloniki","ror":"https://ror.org/02j61yw88","country_code":"GR","type":"education","lineage":["https://openalex.org/I21370196"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Andreas Tsiougkos","raw_affiliation_strings":["Aristotle University of Thessaloniki,Department of Electrical &#x0026; Computer Engineering,Thessaloniki,Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Aristotle University of Thessaloniki,Department of Electrical &#x0026; Computer Engineering,Thessaloniki,Greece","institution_ids":["https://openalex.org/I21370196"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5093766763","display_name":"Moschos Antoniadis","orcid":"https://orcid.org/0009-0009-9987-5993"},"institutions":[{"id":"https://openalex.org/I21370196","display_name":"Aristotle University of Thessaloniki","ror":"https://ror.org/02j61yw88","country_code":"GR","type":"education","lineage":["https://openalex.org/I21370196"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Moschos Antoniadis","raw_affiliation_strings":["Aristotle University of Thessaloniki,Department of Electrical &#x0026; Computer Engineering,Thessaloniki,Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Aristotle University of Thessaloniki,Department of Electrical &#x0026; Computer Engineering,Thessaloniki,Greece","institution_ids":["https://openalex.org/I21370196"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5031542707","display_name":"Vasilis F. Pavlidis","orcid":"https://orcid.org/0000-0002-4063-4652"},"institutions":[{"id":"https://openalex.org/I21370196","display_name":"Aristotle University of Thessaloniki","ror":"https://ror.org/02j61yw88","country_code":"GR","type":"education","lineage":["https://openalex.org/I21370196"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Vasilis F. Pavlidis","raw_affiliation_strings":["Aristotle University of Thessaloniki,Department of Electrical &#x0026; Computer Engineering,Thessaloniki,Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Aristotle University of Thessaloniki,Department of Electrical &#x0026; Computer Engineering,Thessaloniki,Greece","institution_ids":["https://openalex.org/I21370196"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.1628,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.47516837,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9952999949455261,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9952999949455261,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9700000286102295,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9661999940872192,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.7839784622192383},{"id":"https://openalex.org/keywords/diode","display_name":"Diode","score":0.5950056910514832},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5334579944610596},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5236819982528687},{"id":"https://openalex.org/keywords/string","display_name":"String (physics)","score":0.5011744499206543},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.49765875935554504},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.46881818771362305},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4633980095386505},{"id":"https://openalex.org/keywords/stage","display_name":"Stage (stratigraphy)","score":0.4624704420566559},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.3122923970222473},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3023991584777832},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2804037034511566}],"concepts":[{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.7839784622192383},{"id":"https://openalex.org/C78434282","wikidata":"https://www.wikidata.org/wiki/Q11656","display_name":"Diode","level":2,"score":0.5950056910514832},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5334579944610596},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5236819982528687},{"id":"https://openalex.org/C157486923","wikidata":"https://www.wikidata.org/wiki/Q1376436","display_name":"String (physics)","level":2,"score":0.5011744499206543},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.49765875935554504},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.46881818771362305},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4633980095386505},{"id":"https://openalex.org/C146357865","wikidata":"https://www.wikidata.org/wiki/Q1123245","display_name":"Stage (stratigraphy)","level":2,"score":0.4624704420566559},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.3122923970222473},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3023991584777832},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2804037034511566},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/smacd61181.2024.10745438","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd61181.2024.10745438","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8100000023841858,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320320300","display_name":"European Commission","ror":"https://ror.org/00k4n6c32"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1976113919","https://openalex.org/W1999997125","https://openalex.org/W2005091154","https://openalex.org/W2029501881","https://openalex.org/W2036991999","https://openalex.org/W2042081546","https://openalex.org/W2071060149","https://openalex.org/W2081401755","https://openalex.org/W2087698376","https://openalex.org/W2288409056","https://openalex.org/W2344067730","https://openalex.org/W2753758886","https://openalex.org/W2885403455","https://openalex.org/W2897265279","https://openalex.org/W2899927843","https://openalex.org/W2942884311","https://openalex.org/W2952816028","https://openalex.org/W3007406817","https://openalex.org/W3200070222","https://openalex.org/W3203011645","https://openalex.org/W3209455660","https://openalex.org/W4308413425","https://openalex.org/W4312698184","https://openalex.org/W4391382541","https://openalex.org/W6750403012"],"related_works":["https://openalex.org/W631083485","https://openalex.org/W4313452936","https://openalex.org/W2097026685","https://openalex.org/W2480068220","https://openalex.org/W2070883797","https://openalex.org/W4386859288","https://openalex.org/W2102542442","https://openalex.org/W1986220761","https://openalex.org/W2042495646","https://openalex.org/W2047506301"],"abstract_inverted_index":{"A":[0,13],"method":[1],"for":[2,16,102],"designing":[3],"ultra-low":[4],"power":[5],"two-stage":[6,74],"D-string":[7,76],"Digital-to-Analog":[8],"Converters":[9],"(DACs)":[10],"is":[11,24,53],"presented.":[12],"systematic":[14],"approach":[15],"implementing":[17],"highly":[18],"accurate":[19],"DACs":[20],"with":[21,95],"leakage":[22,59],"compensation":[23],"proposed.":[25],"The":[26],"utilization":[27],"of":[28,72,81,97,100,105],"D":[29],"-string":[30],"rather":[31],"than":[32,90],"resistors,":[33],"allows":[34],"resistances":[35],"in":[36,44,60,66],"$\\mathrm{G}":[37],"\\Omega$":[38],"range":[39],"without":[40],"area":[41],"overhead,":[42],"resulting":[43],"remarkably":[45],"constant":[46],"low":[47],"current":[48,101],"consumption.":[49],"Furthermore,":[50],"transistor":[51],"stacking":[52],"employed":[54],"to":[55],"reduce":[56],"the":[57,61],"subthreshold":[58],"DAC":[62,77],"switches.":[63],"Simulation":[64],"results":[65],"GF\u2019s":[67],"22":[68],"nm":[69],"FD-SOI":[70],"process":[71],"a":[73,103],"8-bit":[75],"demonstrate":[78],"high":[79],"accuracy":[80],"$\\sigma_{D":[82],"N":[83,87],"L}":[84],"/":[85,92],"\\sigma_{I":[86],"L}$":[88],"better":[89],"0.021":[91],"0.13":[93],"LSBs":[94],"consumption":[96],"118":[98],"pA":[99],"supply":[104],"580":[106],"mV.":[107]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
