{"id":"https://openalex.org/W4404238734","doi":"https://doi.org/10.1109/smacd61181.2024.10745402","title":"Frontend-Backend Integrated Circuit Device Linking Using Machine Learning Algorithms","display_name":"Frontend-Backend Integrated Circuit Device Linking Using Machine Learning Algorithms","publication_year":2024,"publication_date":"2024-07-02","ids":{"openalex":"https://openalex.org/W4404238734","doi":"https://doi.org/10.1109/smacd61181.2024.10745402"},"language":"en","primary_location":{"id":"doi:10.1109/smacd61181.2024.10745402","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/smacd61181.2024.10745402","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5080745308","display_name":"Ingrid Kovacs","orcid":"https://orcid.org/0000-0002-6734-7207"},"institutions":[{"id":"https://openalex.org/I158333966","display_name":"Technical University of Cluj-Napoca","ror":"https://ror.org/03r8nwp71","country_code":"RO","type":"education","lineage":["https://openalex.org/I158333966"]}],"countries":["RO"],"is_corresponding":false,"raw_author_name":"Ingrid Kovacs","raw_affiliation_strings":["Technical University of Cluj-Napoca,Bases of Electronics Department,Romania"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Technical University of Cluj-Napoca,Bases of Electronics Department,Romania","institution_ids":["https://openalex.org/I158333966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5092558291","display_name":"Bianca C\u0103rbunescu-Stoenescu","orcid":null},"institutions":[{"id":"https://openalex.org/I158333966","display_name":"Technical University of Cluj-Napoca","ror":"https://ror.org/03r8nwp71","country_code":"RO","type":"education","lineage":["https://openalex.org/I158333966"]}],"countries":["RO"],"is_corresponding":false,"raw_author_name":"Bianca C\u0103rbunescu-Stoenescu","raw_affiliation_strings":["Technical University of Cluj-Napoca,Bases of Electronics Department,Romania"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Technical University of Cluj-Napoca,Bases of Electronics Department,Romania","institution_ids":["https://openalex.org/I158333966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068845085","display_name":"Marina \u0162opa","orcid":"https://orcid.org/0000-0003-2891-7219"},"institutions":[{"id":"https://openalex.org/I158333966","display_name":"Technical University of Cluj-Napoca","ror":"https://ror.org/03r8nwp71","country_code":"RO","type":"education","lineage":["https://openalex.org/I158333966"]}],"countries":["RO"],"is_corresponding":false,"raw_author_name":"Marina \u0162opa","raw_affiliation_strings":["Technical University of Cluj-Napoca,Bases of Electronics Department,Romania"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Technical University of Cluj-Napoca,Bases of Electronics Department,Romania","institution_ids":["https://openalex.org/I158333966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040778804","display_name":"Andi Buzo","orcid":"https://orcid.org/0000-0001-6545-5338"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Andi Buzo","raw_affiliation_strings":["Infineon Technologies AG,Neubiberg,Romania"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Infineon Technologies AG,Neubiberg,Romania","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078985732","display_name":"Emilian David","orcid":null},"institutions":[{"id":"https://openalex.org/I4210093765","display_name":"Center of Technology and Engineering for Nuclear Projects","ror":"https://ror.org/00p0qk069","country_code":"RO","type":"other","lineage":["https://openalex.org/I4210093765"]}],"countries":["RO"],"is_corresponding":false,"raw_author_name":"Emilian David","raw_affiliation_strings":["Infineon Technologies,Bucharest,Romania"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Infineon Technologies,Bucharest,Romania","institution_ids":["https://openalex.org/I4210093765"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111705860","display_name":"Georg Pelz","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Georg Pelz","raw_affiliation_strings":["Infineon Technologies AG,Neubiberg,Romania"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Infineon Technologies AG,Neubiberg,Romania","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4514,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.57080056,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9944999814033508,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9944999814033508,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9824000000953674,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9409999847412109,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6643902063369751},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4134984612464905},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3542090058326721},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.32165244221687317}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6643902063369751},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4134984612464905},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3542090058326721},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.32165244221687317}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/smacd61181.2024.10745402","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/smacd61181.2024.10745402","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W592168166","https://openalex.org/W1505044379","https://openalex.org/W1518236483","https://openalex.org/W1972308593","https://openalex.org/W1992413325","https://openalex.org/W2035407142","https://openalex.org/W2085047243","https://openalex.org/W2134895534","https://openalex.org/W2146158110","https://openalex.org/W2158902938","https://openalex.org/W2962202409","https://openalex.org/W3045153201","https://openalex.org/W4230492182","https://openalex.org/W6631122486","https://openalex.org/W6980993111"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W2051487156","https://openalex.org/W2073681303","https://openalex.org/W2390279801","https://openalex.org/W4391913857","https://openalex.org/W2358668433","https://openalex.org/W4396701345","https://openalex.org/W2376932109"],"abstract_inverted_index":{"The":[0,88],"current":[1],"integrated":[2],"circuits\u2019qualification":[3],"phase":[4],"is":[5,95,126],"lacking":[6],"means":[7],"of":[8,84,106,112],"linking":[9,62],"(tracking)":[10],"devices":[11],"without":[12],"ID":[13],"from":[14,116],"backend":[15,78,100,124],"to":[16,28,40,45,74,97,102],"frontend;":[17],"lot":[18],"may":[19,35],"be":[20,29],"known,":[21],"but":[22],"wafer":[23],"and":[24,38,49,123],"coordinates":[25],"are":[26],"difficult":[27],"linked.":[30],"Therefore,":[31],"machine":[32],"learning":[33,115],"techniques":[34],"enable":[36],"traceability":[37],"help":[39],"support":[41],"quality":[42],"management":[43],"actions":[44],"remove":[46],"redundant":[47],"tests":[48],"avoid":[50],"packaging":[51],"for":[52,59,120],"defects.":[53],"This":[54],"paper":[55],"proposes":[56],"a":[57,76,81,99,103],"methodology":[58],"frontend-backend":[60],"device":[61],"that":[63,92],"uses":[64],"the":[65,93],"k-nearest":[66],"neighbor":[67],"algorithm":[68],"computed":[69],"on":[70],"electrical":[71],"parameters":[72],"measurement":[73],"find":[75],"searched":[77],"chip":[79,101],"in":[80],"short":[82,104],"list":[83,105],"targeted":[85],"frontend":[86,107,122],"chips.":[87],"accomplished":[89],"results":[90],"show":[91],"method":[94],"able":[96],"localize":[98],"chips":[108,119],"with":[109],"an":[110],"accuracy":[111],"99.7%,":[113],"when":[114],"some":[117],"labeled":[118],"which":[121],"link":[125],"known.":[127]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
