{"id":"https://openalex.org/W4385412034","doi":"https://doi.org/10.1109/smacd58065.2023.10192136","title":"Application of New Metal-Oxide Memristor Models in Digital and Analog Electronic Circuits","display_name":"Application of New Metal-Oxide Memristor Models in Digital and Analog Electronic Circuits","publication_year":2023,"publication_date":"2023-07-03","ids":{"openalex":"https://openalex.org/W4385412034","doi":"https://doi.org/10.1109/smacd58065.2023.10192136"},"language":"en","primary_location":{"id":"doi:10.1109/smacd58065.2023.10192136","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd58065.2023.10192136","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069189433","display_name":"Stoyan Kirilov","orcid":"https://orcid.org/0000-0001-5520-6274"},"institutions":[{"id":"https://openalex.org/I31151848","display_name":"Technical University of Sofia","ror":"https://ror.org/052prhs50","country_code":"BG","type":"education","lineage":["https://openalex.org/I31151848"]}],"countries":["BG"],"is_corresponding":false,"raw_author_name":"Stoyan Kirilov","raw_affiliation_strings":["Technical University of Sofia,Dept. Fundamentals of Electrical Engineering,Sofia,Bulgaria","Dept. Fundamentals of Electrical Engineering, Technical University of Sofia, Sofia, Bulgaria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Technical University of Sofia,Dept. Fundamentals of Electrical Engineering,Sofia,Bulgaria","institution_ids":["https://openalex.org/I31151848"]},{"raw_affiliation_string":"Dept. Fundamentals of Electrical Engineering, Technical University of Sofia, Sofia, Bulgaria","institution_ids":["https://openalex.org/I31151848"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024570324","display_name":"Valeri Mladenov","orcid":"https://orcid.org/0000-0002-6372-8192"},"institutions":[{"id":"https://openalex.org/I31151848","display_name":"Technical University of Sofia","ror":"https://ror.org/052prhs50","country_code":"BG","type":"education","lineage":["https://openalex.org/I31151848"]}],"countries":["BG"],"is_corresponding":false,"raw_author_name":"Valeri Mladenov","raw_affiliation_strings":["Technical University of Sofia,Dept. Fundamentals of Electrical Engineering,Sofia,Bulgaria","Dept. Fundamentals of Electrical Engineering, Technical University of Sofia, Sofia, Bulgaria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Technical University of Sofia,Dept. Fundamentals of Electrical Engineering,Sofia,Bulgaria","institution_ids":["https://openalex.org/I31151848"]},{"raw_affiliation_string":"Dept. Fundamentals of Electrical Engineering, Technical University of Sofia, Sofia, Bulgaria","institution_ids":["https://openalex.org/I31151848"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I31151848"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9940999746322632,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9936000108718872,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.907241702079773},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.6483522057533264},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6436069011688232},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.633413553237915},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6174696087837219},{"id":"https://openalex.org/keywords/memistor","display_name":"Memistor","score":0.5158714056015015},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.5089783668518066},{"id":"https://openalex.org/keywords/electronics","display_name":"Electronics","score":0.5037779211997986},{"id":"https://openalex.org/keywords/nonlinear-system","display_name":"Nonlinear system","score":0.42402833700180054},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.41029423475265503},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.2935917377471924},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2561134397983551},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1604032814502716},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.11442327499389648}],"concepts":[{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.907241702079773},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.6483522057533264},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6436069011688232},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.633413553237915},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6174696087837219},{"id":"https://openalex.org/C1895703","wikidata":"https://www.wikidata.org/wiki/Q6034938","display_name":"Memistor","level":4,"score":0.5158714056015015},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.5089783668518066},{"id":"https://openalex.org/C138331895","wikidata":"https://www.wikidata.org/wiki/Q11650","display_name":"Electronics","level":2,"score":0.5037779211997986},{"id":"https://openalex.org/C158622935","wikidata":"https://www.wikidata.org/wiki/Q660848","display_name":"Nonlinear system","level":2,"score":0.42402833700180054},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.41029423475265503},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.2935917377471924},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2561134397983551},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1604032814502716},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.11442327499389648},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/smacd58065.2023.10192136","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd58065.2023.10192136","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.699999988079071,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320329128","display_name":"Technical University of Sofia","ror":"https://ror.org/052prhs50"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W1974899890","https://openalex.org/W1986273360","https://openalex.org/W2003942425","https://openalex.org/W2019912182","https://openalex.org/W2022839807","https://openalex.org/W2083537989","https://openalex.org/W2094325813","https://openalex.org/W2096830952","https://openalex.org/W2103531629","https://openalex.org/W2112181056","https://openalex.org/W2153690880","https://openalex.org/W2215517785","https://openalex.org/W2420036144","https://openalex.org/W2603064927","https://openalex.org/W2747214275","https://openalex.org/W2755163763","https://openalex.org/W2760384882","https://openalex.org/W3038129536","https://openalex.org/W3106114372","https://openalex.org/W3174836003","https://openalex.org/W4224306714","https://openalex.org/W4283752417","https://openalex.org/W4283761905","https://openalex.org/W4285047341","https://openalex.org/W4288389148","https://openalex.org/W4288389163","https://openalex.org/W4315700798","https://openalex.org/W4318476039","https://openalex.org/W6601798891","https://openalex.org/W6736339276","https://openalex.org/W6743019636"],"related_works":["https://openalex.org/W3170109256","https://openalex.org/W2185262500","https://openalex.org/W4251693286","https://openalex.org/W1543954628","https://openalex.org/W4385367273","https://openalex.org/W2797315502","https://openalex.org/W2163054919","https://openalex.org/W4283019775","https://openalex.org/W4252977987","https://openalex.org/W608447876"],"abstract_inverted_index":{"Memristors,":[0],"as":[1,115,142],"novel":[2],"nonlinear":[3],"electronic":[4,34,100,171],"components":[5],"are":[6,31,72,75,126,132,159],"under":[7],"intensive":[8],"analyses,":[9],"owing":[10],"to":[11,25,91,134,139],"their":[12,106],"excellent":[13],"switching":[14,148],"and":[15,22,52,61,81,102,108,122,150,167,173],"memory":[16,116],"properties,":[17],"low":[18],"power":[19],"usage,":[20],"nano-sizes,":[21],"good":[23,79,164],"compatibility":[24],"traditional":[26],"CMOS":[27],"integrated":[28],"chips.":[29,38],"They":[30,74],"applicable":[32],"in":[33,37,99,110,169],"schemes,":[35,114],"incorporated":[36],"Engineering":[39],"of":[40,47,87,95,105,155],"memristor":[41,63,130],"circuits":[42,125],"presents":[43],"opportunities":[44],"for":[45],"design":[46],"chips":[48],"with":[49,77],"ultra-high":[50],"density":[51],"many":[53],"applications.":[54],"In":[55],"the":[56,67,93,96,156],"last":[57],"years,":[58],"several":[59],"modified":[60,129],"enhanced":[62,97],"models,":[64,137],"built":[65],"on":[66],"frequently":[68],"used":[69],"standard":[70,136],"models":[71,98,131,158],"proposed.":[73],"simplified,":[76],"a":[78,103],"accuracy":[80],"high":[82],"operating":[83,143],"rate.":[84],"The":[85,128,152],"aim":[86],"this":[88],"paper":[89],"is":[90],"present":[92],"applicability":[94,168],"schemes":[101],"comparison":[104],"properties":[107,149],"performance":[109],"LTSPICE":[111],"environment.":[112],"Several":[113],"crossbars,":[117],"logic":[118],"gates,":[119],"neural":[120],"nets,":[121],"various":[123,135],"reconfigurable":[124],"analyzed.":[127],"compared":[133],"according":[138],"different":[140],"criteria,":[141],"frequency,":[144],"precision,":[145],"simulation":[146],"time,":[147],"complexity.":[151],"major":[153],"advantages":[154],"improved":[157],"represented":[160],"\u2013":[161],"fast":[162],"operation,":[163],"convergence,":[165],"accuracy,":[166],"complex":[170],"devices":[172],"circuits.":[174]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1}],"updated_date":"2026-07-15T18:14:33.161393","created_date":"2025-10-10T00:00:00"}