{"id":"https://openalex.org/W2968824443","doi":"https://doi.org/10.1109/smacd.2019.8795297","title":"On the Exploration of Design Tradeoffs in Analog IC Placement with Layout-dependent Effects","display_name":"On the Exploration of Design Tradeoffs in Analog IC Placement with Layout-dependent Effects","publication_year":2019,"publication_date":"2019-07-01","ids":{"openalex":"https://openalex.org/W2968824443","doi":"https://doi.org/10.1109/smacd.2019.8795297","mag":"2968824443"},"language":"en","primary_location":{"id":"doi:10.1109/smacd.2019.8795297","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd.2019.8795297","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060778711","display_name":"Ricardo Martins","orcid":"https://orcid.org/0000-0002-8251-1415"},"institutions":[{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]},{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]}],"countries":["PT"],"is_corresponding":true,"raw_author_name":"Ricardo Martins","raw_affiliation_strings":["Instituto de Telecomunica\u00e7\u00f5es, Universidade de Lisboa, Lisboa, Portugal"],"affiliations":[{"raw_affiliation_string":"Instituto de Telecomunica\u00e7\u00f5es, Universidade de Lisboa, Lisboa, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031570767","display_name":"Nuno Loureneo","orcid":null},"institutions":[{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]},{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Nuno Loureneo","raw_affiliation_strings":["Instituto de Telecomunica\u00e7\u00f5es, Universidade de Lisboa, Lisboa, Portugal"],"affiliations":[{"raw_affiliation_string":"Instituto de Telecomunica\u00e7\u00f5es, Universidade de Lisboa, Lisboa, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073107689","display_name":"Ricardo P\u00f3voa","orcid":"https://orcid.org/0000-0003-2941-7494"},"institutions":[{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]},{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Ricardo Povoa","raw_affiliation_strings":["Instituto de Telecomunica\u00e7\u00f5es, Universidade de Lisboa, Lisboa, Portugal"],"affiliations":[{"raw_affiliation_string":"Instituto de Telecomunica\u00e7\u00f5es, Universidade de Lisboa, Lisboa, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5056512471","display_name":"Nuno Horta","orcid":"https://orcid.org/0000-0002-1687-1447"},"institutions":[{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]},{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Nuno Horta","raw_affiliation_strings":["Instituto de Telecomunica\u00e7\u00f5es, Universidade de Lisboa, Lisboa, Portugal"],"affiliations":[{"raw_affiliation_string":"Instituto de Telecomunica\u00e7\u00f5es, Universidade de Lisboa, Lisboa, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5060778711"],"corresponding_institution_ids":["https://openalex.org/I141596103","https://openalex.org/I4210120471"],"apc_list":null,"apc_paid":null,"fwci":0.5961,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.68757766,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"25","last_page":"28"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5701189041137695},{"id":"https://openalex.org/keywords/integrated-circuit-layout","display_name":"Integrated circuit layout","score":0.5352303385734558},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.480758398771286},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3827698826789856},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.2823697328567505},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.18629884719848633}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5701189041137695},{"id":"https://openalex.org/C2765594","wikidata":"https://www.wikidata.org/wiki/Q2624187","display_name":"Integrated circuit layout","level":3,"score":0.5352303385734558},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.480758398771286},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3827698826789856},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2823697328567505},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.18629884719848633},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/smacd.2019.8795297","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd.2019.8795297","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Sustainable cities and communities","id":"https://metadata.un.org/sdg/11","score":0.4000000059604645}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W2015428081","https://openalex.org/W2118783459","https://openalex.org/W2120475991","https://openalex.org/W2143770383","https://openalex.org/W2148808647","https://openalex.org/W2332691800","https://openalex.org/W2410199112","https://openalex.org/W2489133239","https://openalex.org/W2799969132","https://openalex.org/W2799971163","https://openalex.org/W2886364157","https://openalex.org/W2905247075","https://openalex.org/W2940735040"],"related_works":["https://openalex.org/W4321510758","https://openalex.org/W1757458251","https://openalex.org/W2885948601","https://openalex.org/W4389672975","https://openalex.org/W2170433636","https://openalex.org/W2942050196","https://openalex.org/W1568098132","https://openalex.org/W2304810057","https://openalex.org/W2110634429","https://openalex.org/W2138401961"],"abstract_inverted_index":{"At":[0],"advanced":[1],"integration":[2],"nodes,":[3,93],"the":[4,11,19,31,35,57,75,82,89,106,136],"impact":[5],"of":[6,13,25,86,99,105],"layout-dependent":[7],"effects":[8],"(LDEs)":[9],"turn":[10],"performance":[12],"MOSFET":[14],"devices":[15],"strongly":[16],"dependent":[17],"on":[18],"layout":[20,71],"implementation":[21],"details,":[22],"but":[23],"also,":[24],"its":[26],"surrounding":[27],"neighborhood.":[28],"However,":[29],"in":[30,126],"traditional":[32],"design":[33],"flow,":[34],"real":[36],"LDEs-impact":[37],"is":[38,108,120],"only":[39],"known":[40],"after":[41],"complete":[42],"extraction":[43],"and":[44,77,97,140],"post-layout":[45,141],"simulation,":[46],"causing":[47],"re-design":[48],"iterations":[49],"with":[50,116],"no":[51],"valuable":[52],"feedback":[53],"information":[54],"to":[55,131],"fix":[56],"problem.":[58],"This":[59],"paper":[60],"proposes":[61],"an":[62],"automatic":[63],"placement":[64,133],"methodology":[65],"for":[66],"analog":[67],"integrated":[68],"circuit":[69],"(IC)":[70],"design,":[72],"that":[73],"minimizes":[74],"mobility":[76],"threshold-voltage-related":[78],"variations":[79],"caused":[80],"by":[81],"two":[83],"major":[84],"sources":[85],"LDEs":[87],"above":[88],"40":[90],"nm":[91],"technology":[92],"i.e.,":[94],"well-proximity":[95],"effect":[96],"length":[98],"oxide":[100],"diffusion.":[101],"An":[102],"absolute":[103],"representation":[104],"floorplan":[107],"adopted,":[109],"and,":[110],"a":[111],"multi-objective":[112],"optimization":[113],"(MOO)":[114],"algorithm":[115],"LDE-impact":[117],"mitigation":[118],"operators,":[119],"applied.":[121],"Established":[122],"LDE":[123],"formulations":[124],"used":[125,130],"BSIM":[127],"models":[128],"are":[129],"guide":[132],"optimization,":[134],"shorting":[135],"gap":[137],"between":[138],"pre":[139],"performance.":[142]},"counts_by_year":[{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":3},{"year":2019,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
