{"id":"https://openalex.org/W2969061143","doi":"https://doi.org/10.1109/smacd.2019.8795240","title":"Using EDA Tools to Push the Performance Boundaries of an Ultralow-Power IoT-VCO at 65nm","display_name":"Using EDA Tools to Push the Performance Boundaries of an Ultralow-Power IoT-VCO at 65nm","publication_year":2019,"publication_date":"2019-07-01","ids":{"openalex":"https://openalex.org/W2969061143","doi":"https://doi.org/10.1109/smacd.2019.8795240","mag":"2969061143"},"language":"en","primary_location":{"id":"doi:10.1109/smacd.2019.8795240","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd.2019.8795240","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060778711","display_name":"Ricardo Martins","orcid":"https://orcid.org/0000-0002-8251-1415"},"institutions":[{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]},{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]},{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO","PT"],"is_corresponding":true,"raw_author_name":"Ricardo Martins","raw_affiliation_strings":["Instituto de Telecomunica&#x00E7;&#x00F5;es, Instituto Superior T&#x00E9;cnico, Universidade de Lisboa, Lisboa, Portugal","State-Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China","Instituto de Telecomunica\u00e7\u00f5es, Universidade de Lisboa, Lisboa, Portugal"],"affiliations":[{"raw_affiliation_string":"Instituto de Telecomunica&#x00E7;&#x00F5;es, Instituto Superior T&#x00E9;cnico, Universidade de Lisboa, Lisboa, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]},{"raw_affiliation_string":"State-Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]},{"raw_affiliation_string":"Instituto de Telecomunica\u00e7\u00f5es, Universidade de Lisboa, Lisboa, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065716990","display_name":"Nuno Louren\u00e7o","orcid":"https://orcid.org/0000-0002-9625-6435"},"institutions":[{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]},{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Nuno Louren\u00e7o","raw_affiliation_strings":["Instituto de Telecomunica&#x00E7;&#x00F5;es, Instituto Superior T&#x00E9;cnico, Universidade de Lisboa, Lisboa, Portugal","Instituto de Telecomunica\u00e7\u00f5es, Universidade de Lisboa, Lisboa, Portugal"],"affiliations":[{"raw_affiliation_string":"Instituto de Telecomunica&#x00E7;&#x00F5;es, Instituto Superior T&#x00E9;cnico, Universidade de Lisboa, Lisboa, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]},{"raw_affiliation_string":"Instituto de Telecomunica\u00e7\u00f5es, Universidade de Lisboa, Lisboa, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056512471","display_name":"Nuno Horta","orcid":"https://orcid.org/0000-0002-1687-1447"},"institutions":[{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]},{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Nuno Horta","raw_affiliation_strings":["Instituto de Telecomunica&#x00E7;&#x00F5;es, Instituto Superior T&#x00E9;cnico, Universidade de Lisboa, Lisboa, Portugal","Instituto de Telecomunica\u00e7\u00f5es, Universidade de Lisboa, Lisboa, Portugal"],"affiliations":[{"raw_affiliation_string":"Instituto de Telecomunica&#x00E7;&#x00F5;es, Instituto Superior T&#x00E9;cnico, Universidade de Lisboa, Lisboa, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]},{"raw_affiliation_string":"Instituto de Telecomunica\u00e7\u00f5es, Universidade de Lisboa, Lisboa, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006541988","display_name":"Jun Yin","orcid":"https://orcid.org/0000-0002-4195-4551"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Jun Yin","raw_affiliation_strings":["State-Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China"],"affiliations":[{"raw_affiliation_string":"State-Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058845450","display_name":"Pui\u2010In Mak","orcid":"https://orcid.org/0000-0002-3579-8740"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Pui-In Mak","raw_affiliation_strings":["State-Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China"],"affiliations":[{"raw_affiliation_string":"State-Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5106943352","display_name":"Rui P. Martins","orcid":"https://orcid.org/0000-0003-2821-648X"},"institutions":[{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]},{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]},{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO","PT"],"is_corresponding":false,"raw_author_name":"Rui P. Martins","raw_affiliation_strings":["Instituto de Telecomunica&#x00E7;&#x00F5;es, Instituto Superior T&#x00E9;cnico, Universidade de Lisboa, Lisboa, Portugal","State-Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China"],"affiliations":[{"raw_affiliation_string":"Instituto de Telecomunica&#x00E7;&#x00F5;es, Instituto Superior T&#x00E9;cnico, Universidade de Lisboa, Lisboa, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]},{"raw_affiliation_string":"State-Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5060778711"],"corresponding_institution_ids":["https://openalex.org/I141596103","https://openalex.org/I204512498","https://openalex.org/I4210120471"],"apc_list":null,"apc_paid":null,"fwci":0.1192,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.45801276,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"37","last_page":"40"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/schematic","display_name":"Schematic","score":0.7980117797851562},{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.6307750940322876},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5766746997833252},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.5518447160720825},{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.5092815160751343},{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.49556028842926025},{"id":"https://openalex.org/keywords/integrated-circuit-layout","display_name":"Integrated circuit layout","score":0.4900423288345337},{"id":"https://openalex.org/keywords/transceiver","display_name":"Transceiver","score":0.4864366054534912},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.4746340215206146},{"id":"https://openalex.org/keywords/power-optimization","display_name":"Power optimization","score":0.46210750937461853},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.461883008480072},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4282934069633484},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4275229871273041},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.42059263586997986},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.40743541717529297},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.40375831723213196},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3964749872684479},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.3747473657131195},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.3568965792655945},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.3187597095966339},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.28997981548309326},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.26986929774284363},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2569073438644409},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.11854124069213867},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11701405048370361},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.11409080028533936}],"concepts":[{"id":"https://openalex.org/C192328126","wikidata":"https://www.wikidata.org/wiki/Q4514647","display_name":"Schematic","level":2,"score":0.7980117797851562},{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.6307750940322876},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5766746997833252},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.5518447160720825},{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.5092815160751343},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.49556028842926025},{"id":"https://openalex.org/C2765594","wikidata":"https://www.wikidata.org/wiki/Q2624187","display_name":"Integrated circuit layout","level":3,"score":0.4900423288345337},{"id":"https://openalex.org/C7720470","wikidata":"https://www.wikidata.org/wiki/Q954187","display_name":"Transceiver","level":3,"score":0.4864366054534912},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.4746340215206146},{"id":"https://openalex.org/C168292644","wikidata":"https://www.wikidata.org/wiki/Q10860336","display_name":"Power optimization","level":4,"score":0.46210750937461853},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.461883008480072},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4282934069633484},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4275229871273041},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.42059263586997986},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.40743541717529297},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.40375831723213196},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3964749872684479},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.3747473657131195},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.3568965792655945},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.3187597095966339},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.28997981548309326},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.26986929774284363},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2569073438644409},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.11854124069213867},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11701405048370361},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.11409080028533936},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/smacd.2019.8795240","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd.2019.8795240","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8399999737739563}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W2012967215","https://openalex.org/W2142408027","https://openalex.org/W2150935719","https://openalex.org/W2156076271","https://openalex.org/W2521349449","https://openalex.org/W2791209703","https://openalex.org/W2792845171","https://openalex.org/W2799969132","https://openalex.org/W2885948601","https://openalex.org/W2897852927"],"related_works":["https://openalex.org/W2743305891","https://openalex.org/W4321510758","https://openalex.org/W3205162826","https://openalex.org/W2165817382","https://openalex.org/W2110346573","https://openalex.org/W4389672975","https://openalex.org/W2154454108","https://openalex.org/W2610167993","https://openalex.org/W2223186343","https://openalex.org/W2056740847"],"abstract_inverted_index":{"Voltage-controlled":[0],"oscillators":[1],"(VCOs)":[2],"embedded":[3],"in":[4,135],"state-of-the-art":[5],"radio-frequency":[6],"(RF)":[7],"integrated":[8],"circuit":[9],"(IC)":[10],"multistandard":[11],"transceivers":[12],"must":[13,31],"comply":[14],"with":[15,142],"extreme":[16],"ultralow":[17],"power":[18,93,148],"requirements":[19],"for":[20,63,152],"modern":[21],"IoT":[22],"applications.":[23],"However,":[24],"due":[25],"to":[26,99],"the":[27,39,55,92,103,108,113],"countless":[28],"tradeoffs":[29],"that":[30,42],"be":[32],"considered,":[33],"their":[34],"manual":[35],"design":[36,56,68,76],"hardly":[37],"approaches":[38],"full":[40],"potential":[41],"a":[43,60,64,81,125,139],"certain":[44],"topology":[45],"can":[46],"achieve":[47],"at":[48],"advanced":[49],"integration":[50],"nodes.":[51],"In":[52],"this":[53],"paper,":[54],"and":[57,128],"optimization":[58],"of":[59,107,118,145],"complex":[61],"IoT-VCO":[62],"65":[65],"nm":[66],"process":[67],"kit":[69],"(PDK)":[70],"is":[71,85,121,133,150],"fully":[72],"supported":[73],"by":[74],"electronic":[75],"automation":[77],"(EDA)":[78],"tools.":[79],"Firstly,":[80],"108-dimensional":[82],"performance":[83,106],"space":[84],"optimized,":[86],"providing":[87],"48":[88],"sizing":[89],"solutions":[90],"where":[91],"consumption":[94,149],"varies":[95],"from":[96],"0.145":[97],"mW":[98,101,144],"0.329":[100],"on":[102],"worst-case":[104,109,146],"corner":[105],"tuning":[110],"range.":[111],"Afterwards,":[112],"layout-versus-schematic":[114],"(LVS)":[115],"correct":[116],"layout":[117],"each":[119],"solution":[120,141],"automatically":[122],"generated":[123],"using":[124],"hierarchical":[126],"Placer":[127],"group-based":[129],"Router.":[130],"Post-layout":[131],"validation":[132],"carried":[134],"all":[136],"solutions,":[137],"and,":[138],"promising":[140],"0.348":[143],"post-layout":[147],"proposed":[151],"fabrication.":[153]},"counts_by_year":[{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
