{"id":"https://openalex.org/W2967540737","doi":"https://doi.org/10.1109/smacd.2019.8795222","title":"Requirements, for Industrial Analog Faulf-Simulator","display_name":"Requirements, for Industrial Analog Faulf-Simulator","publication_year":2019,"publication_date":"2019-07-01","ids":{"openalex":"https://openalex.org/W2967540737","doi":"https://doi.org/10.1109/smacd.2019.8795222","mag":"2967540737"},"language":"en","primary_location":{"id":"doi:10.1109/smacd.2019.8795222","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd.2019.8795222","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5108501884","display_name":"V. Zivkovic","orcid":null},"institutions":[{"id":"https://openalex.org/I66217453","display_name":"Cadence Design Systems (United States)","ror":"https://ror.org/04w8xa018","country_code":"US","type":"company","lineage":["https://openalex.org/I66217453"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Vladimir Zivkovic","raw_affiliation_strings":["Cadence Design Systems"],"affiliations":[{"raw_affiliation_string":"Cadence Design Systems","institution_ids":["https://openalex.org/I66217453"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5027024294","display_name":"Art Schaldenbrand","orcid":null},"institutions":[{"id":"https://openalex.org/I66217453","display_name":"Cadence Design Systems (United States)","ror":"https://ror.org/04w8xa018","country_code":"US","type":"company","lineage":["https://openalex.org/I66217453"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Art Schaldenbrand","raw_affiliation_strings":["Cadence Design Systems"],"affiliations":[{"raw_affiliation_string":"Cadence Design Systems","institution_ids":["https://openalex.org/I66217453"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5108501884"],"corresponding_institution_ids":["https://openalex.org/I66217453"],"apc_list":null,"apc_paid":null,"fwci":1.2038,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.77641534,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"61","last_page":"64"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13293","display_name":"Engineering and Test Systems","score":0.9858999848365784,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cadence","display_name":"Cadence","score":0.7235159277915955},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.6286567449569702},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6056361794471741},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.546635091304779},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.47299724817276},{"id":"https://openalex.org/keywords/product","display_name":"Product (mathematics)","score":0.45667383074760437},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.41940271854400635},{"id":"https://openalex.org/keywords/simulation","display_name":"Simulation","score":0.40542322397232056},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3071286678314209},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3003047704696655},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2000250220298767},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.12659943103790283}],"concepts":[{"id":"https://openalex.org/C2777125575","wikidata":"https://www.wikidata.org/wiki/Q14088448","display_name":"Cadence","level":2,"score":0.7235159277915955},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.6286567449569702},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6056361794471741},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.546635091304779},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.47299724817276},{"id":"https://openalex.org/C90673727","wikidata":"https://www.wikidata.org/wiki/Q901718","display_name":"Product (mathematics)","level":2,"score":0.45667383074760437},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.41940271854400635},{"id":"https://openalex.org/C44154836","wikidata":"https://www.wikidata.org/wiki/Q45045","display_name":"Simulation","level":1,"score":0.40542322397232056},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3071286678314209},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3003047704696655},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2000250220298767},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.12659943103790283},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/smacd.2019.8795222","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd.2019.8795222","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.550000011920929,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1595372038","https://openalex.org/W1970655797","https://openalex.org/W2057296358","https://openalex.org/W2068778760","https://openalex.org/W2088797164","https://openalex.org/W2101456051","https://openalex.org/W2553580748","https://openalex.org/W2810737259","https://openalex.org/W2967416136"],"related_works":["https://openalex.org/W4289538008","https://openalex.org/W3186427148","https://openalex.org/W2138282914","https://openalex.org/W2065850627","https://openalex.org/W2017012638","https://openalex.org/W2071885361","https://openalex.org/W1966793535","https://openalex.org/W1964447062","https://openalex.org/W2088265144","https://openalex.org/W3163522598"],"abstract_inverted_index":{"This":[0],"article":[1],"discusses":[2],"the":[3,36,55],"prerequisites":[4],"that":[5,16],"enable":[6],"practical":[7],"EDA":[8],"solution":[9],"for":[10,30,35,45],"analog":[11,31,46,59],"fault":[12,47,60],"simulation.":[13],"It":[14],"shows":[15],"a":[17,40],"strict":[18],"and":[19,51],"realistic":[20],"definition":[21],"set":[22],"of":[23,38,58],"targets,":[24],"compliant":[25],"with":[26],"emerging":[27],"IEEE":[28],"standards":[29],"test,":[32],"is":[33,49,66],"crucial":[34],"success":[37],"such":[39],"product.":[41],"The":[42],"Cadence\u00ae":[43],"product":[44],"simulation":[48,61],"presented":[50],"options":[52],"to":[53],"mitigate":[54],"evergreen":[56],"problem":[57],"adoption":[62],"in":[63],"industrial":[64],"applications":[65],"listed.":[67]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}