{"id":"https://openalex.org/W2887269746","doi":"https://doi.org/10.1109/smacd.2018.8434921","title":"Inverting Versus Non-Inverting Dynamic Logic for Two-Phase Latch-free Nanopipelines","display_name":"Inverting Versus Non-Inverting Dynamic Logic for Two-Phase Latch-free Nanopipelines","publication_year":2018,"publication_date":"2018-07-01","ids":{"openalex":"https://openalex.org/W2887269746","doi":"https://doi.org/10.1109/smacd.2018.8434921","mag":"2887269746"},"language":"en","primary_location":{"id":"doi:10.1109/smacd.2018.8434921","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd.2018.8434921","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5057723485","display_name":"H\u00e9ctor J. Quintero","orcid":null},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Hector J. Quintero","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Sevilla, IMSE-CNM (CSIC/Universidad de Sevilla), Seville, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Sevilla, IMSE-CNM (CSIC/Universidad de Sevilla), Seville, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100599693","display_name":"Manuel Jim\u00e9nez","orcid":"https://orcid.org/0000-0002-0625-8809"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Manuel Jimenez","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Sevilla, IMSE-CNM (CSIC/Universidad de Sevilla), Seville, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Sevilla, IMSE-CNM (CSIC/Universidad de Sevilla), Seville, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031060766","display_name":"M.J. Avedillo","orcid":"https://orcid.org/0000-0002-8345-8441"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Maria J. Avedillo","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Sevilla, IMSE-CNM (CSIC/Universidad de Sevilla), Seville, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Sevilla, IMSE-CNM (CSIC/Universidad de Sevilla), Seville, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101455624","display_name":"Juan N\u00fa\u00f1ez","orcid":"https://orcid.org/0000-0002-0279-9472"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Juan Nunez","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Sevilla, IMSE-CNM (CSIC/Universidad de Sevilla), Seville, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Sevilla, IMSE-CNM (CSIC/Universidad de Sevilla), Seville, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.13187514,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"81","last_page":"84"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/domino","display_name":"Domino","score":0.784633457660675},{"id":"https://openalex.org/keywords/domino-logic","display_name":"Domino logic","score":0.7278328537940979},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.6518571376800537},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6252065896987915},{"id":"https://openalex.org/keywords/pipeline-transport","display_name":"Pipeline transport","score":0.5865663290023804},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5471484065055847},{"id":"https://openalex.org/keywords/dynamic-logic","display_name":"Dynamic logic (digital electronics)","score":0.5209090113639832},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.4837336838245392},{"id":"https://openalex.org/keywords/logic-level","display_name":"Logic level","score":0.4808843433856964},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.47433748841285706},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.47297683358192444},{"id":"https://openalex.org/keywords/logic-optimization","display_name":"Logic optimization","score":0.45076262950897217},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.444868803024292},{"id":"https://openalex.org/keywords/domino-effect","display_name":"Domino effect","score":0.4212225675582886},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.2855622172355652},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.26008230447769165},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.24895921349525452},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.21242853999137878},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2070031464099884},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1474788784980774},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.14144101738929749},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.09751930832862854}],"concepts":[{"id":"https://openalex.org/C2776416436","wikidata":"https://www.wikidata.org/wiki/Q3751781","display_name":"Domino","level":3,"score":0.784633457660675},{"id":"https://openalex.org/C2777555262","wikidata":"https://www.wikidata.org/wiki/Q173391","display_name":"Domino logic","level":5,"score":0.7278328537940979},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.6518571376800537},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6252065896987915},{"id":"https://openalex.org/C175309249","wikidata":"https://www.wikidata.org/wiki/Q725864","display_name":"Pipeline transport","level":2,"score":0.5865663290023804},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5471484065055847},{"id":"https://openalex.org/C2777796570","wikidata":"https://www.wikidata.org/wiki/Q2351326","display_name":"Dynamic logic (digital electronics)","level":4,"score":0.5209090113639832},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.4837336838245392},{"id":"https://openalex.org/C146569638","wikidata":"https://www.wikidata.org/wiki/Q173378","display_name":"Logic level","level":3,"score":0.4808843433856964},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.47433748841285706},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.47297683358192444},{"id":"https://openalex.org/C28449271","wikidata":"https://www.wikidata.org/wiki/Q6667469","display_name":"Logic optimization","level":4,"score":0.45076262950897217},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.444868803024292},{"id":"https://openalex.org/C155223936","wikidata":"https://www.wikidata.org/wiki/Q682875","display_name":"Domino effect","level":2,"score":0.4212225675582886},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.2855622172355652},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.26008230447769165},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.24895921349525452},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.21242853999137878},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2070031464099884},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1474788784980774},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.14144101738929749},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.09751930832862854},{"id":"https://openalex.org/C161790260","wikidata":"https://www.wikidata.org/wiki/Q82264","display_name":"Catalysis","level":2,"score":0.0},{"id":"https://openalex.org/C185544564","wikidata":"https://www.wikidata.org/wiki/Q81197","display_name":"Nuclear physics","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C87717796","wikidata":"https://www.wikidata.org/wiki/Q146326","display_name":"Environmental engineering","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/smacd.2018.8434921","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd.2018.8434921","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","raw_type":"proceedings-article"},{"id":"pmh:oai:digital.csic.es:10261/180405","is_oa":false,"landing_page_url":"http://hdl.handle.net/10261/180405","pdf_url":null,"source":{"id":"https://openalex.org/S4306400616","display_name":"DIGITAL.CSIC (Spanish National Research Council (CSIC))","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I134820265","host_organization_name":"Consejo Superior de Investigaciones Cient\u00edficas","host_organization_lineage":["https://openalex.org/I134820265"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"comunicaci\u00f3n de congreso"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.41999998688697815}],"awards":[{"id":"https://openalex.org/G5538490418","display_name":null,"funder_award_id":"TEC2017-87052-P","funder_id":"https://openalex.org/F4320321837","funder_display_name":"Ministerio de Econom\u00eda y Competitividad"}],"funders":[{"id":"https://openalex.org/F4320321837","display_name":"Ministerio de Econom\u00eda y Competitividad","ror":"https://ror.org/034900433"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W990634443","https://openalex.org/W1601789160","https://openalex.org/W2031360599","https://openalex.org/W2031743178","https://openalex.org/W2114020094","https://openalex.org/W2157465781","https://openalex.org/W2159868837","https://openalex.org/W2273399093","https://openalex.org/W2555004525","https://openalex.org/W4230737292","https://openalex.org/W4248980923"],"related_works":["https://openalex.org/W2118487491","https://openalex.org/W2155174752","https://openalex.org/W2890889888","https://openalex.org/W2158157809","https://openalex.org/W2136656113","https://openalex.org/W321873635","https://openalex.org/W2171918386","https://openalex.org/W2127151832","https://openalex.org/W1601832081","https://openalex.org/W4242411358"],"abstract_inverted_index":{"Very":[0],"fine":[1],"grained":[2],"latch-free":[3],"pipelines":[4,110,129],"are":[5,17,130],"successfully":[6],"used":[7],"in":[8,19,98],"critical":[9,96],"parts":[10],"of":[11,29,38,51,56,92,107],"high":[12],"performance":[13,106],"systems.":[14],"These":[15],"approaches":[16],"based":[18],"Domino":[20,93,113],"logic":[21,30,62],"and":[22,35,67,79,103,114,134],"multi-phase":[23],"clock":[24,33,65,69],"schemes.":[25],"Reducing":[26],"the":[27,36,41,49,54,89,105],"number":[28,37],"levels":[31],"per":[32,64],"phase":[34,66],"phases":[39,70],"to":[40,47],"minimum":[42],"is":[43,71],"a":[44,72,95],"potential":[45],"way":[46],"push":[48],"limits":[50],"speed.":[52],"However":[53],"implementation":[55],"such":[57],"architectures":[58],"with":[59,112,115],"just":[60],"one":[61],"level":[63],"two":[68],"challenge":[73],"which":[74],"requires":[75],"extremely":[76],"full-custom":[77],"design":[78],"exhibits":[80],"robustness":[81],"concerns.":[82],"In":[83],"this":[84],"paper":[85],"we":[86,121],"show":[87],"that":[88,127],"non-inverting":[90],"feature":[91],"plays":[94],"role":[97],"these":[99],"difficulties.":[100],"We":[101],"analyze":[102],"compare":[104],"two-phase":[108],"gate-level":[109],"implemented":[111],"ILP,":[116],"an":[117],"inverting":[118],"dynamic":[119],"gate":[120],"have":[122],"proposed.":[123],"Our":[124],"experiments":[125],"confirm":[126],"ILP":[128],"much":[131],"more":[132],"robust":[133],"could":[135],"simplify":[136],"design.":[137]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}