{"id":"https://openalex.org/W2885948601","doi":"https://doi.org/10.1109/smacd.2018.8434887","title":"Handling the Effects of Variability and Layout Parasitics in the Automatic Synthesis of LNAs","display_name":"Handling the Effects of Variability and Layout Parasitics in the Automatic Synthesis of LNAs","publication_year":2018,"publication_date":"2018-07-01","ids":{"openalex":"https://openalex.org/W2885948601","doi":"https://doi.org/10.1109/smacd.2018.8434887","mag":"2885948601"},"language":"en","primary_location":{"id":"doi:10.1109/smacd.2018.8434887","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd.2018.8434887","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5040394510","display_name":"F\u00e1bio Passos","orcid":"https://orcid.org/0000-0002-5638-7377"},"institutions":[{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"F. Passos","raw_affiliation_strings":["Universidad de Sevilla, Sevilla, Andaluc\u00c3\u00ada, ES","Universidad de Sevilla, Sevilla, Andaluc\u00eda, ES"],"affiliations":[{"raw_affiliation_string":"Universidad de Sevilla, Sevilla, Andaluc\u00c3\u00ada, ES","institution_ids":["https://openalex.org/I79238269"]},{"raw_affiliation_string":"Universidad de Sevilla, Sevilla, Andaluc\u00eda, ES","institution_ids":["https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060778711","display_name":"Ricardo Martins","orcid":"https://orcid.org/0000-0002-8251-1415"},"institutions":[{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]},{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"R. Martins","raw_affiliation_strings":["Instituto de Telecomunica\u00e7\u00f5es, Instituto Superior Tecnico - Universidade de Lisboa, Lisbon, Portugal"],"affiliations":[{"raw_affiliation_string":"Instituto de Telecomunica\u00e7\u00f5es, Instituto Superior Tecnico - Universidade de Lisboa, Lisbon, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065716990","display_name":"Nuno Louren\u00e7o","orcid":"https://orcid.org/0000-0002-9625-6435"},"institutions":[{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]},{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"N. Lourenco","raw_affiliation_strings":["Instituto de Telecomunica\u00e7\u00f5es, Instituto Superior Tecnico - Universidade de Lisboa, Lisbon, Portugal"],"affiliations":[{"raw_affiliation_string":"Instituto de Telecomunica\u00e7\u00f5es, Instituto Superior Tecnico - Universidade de Lisboa, Lisbon, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011140420","display_name":"E. Roca","orcid":"https://orcid.org/0000-0001-6260-6495"},"institutions":[{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]},{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"E. Roca","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Sevilla, CSIC - Universidad de Sevilla, Seville, Spain"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Sevilla, CSIC - Universidad de Sevilla, Seville, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068422347","display_name":"R. Castro\u2010L\u00f3pez","orcid":"https://orcid.org/0000-0002-6247-3124"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"R. Castro-Lopez","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Sevilla, CSIC - Universidad de Sevilla, Seville, Spain"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Sevilla, CSIC - Universidad de Sevilla, Seville, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073107689","display_name":"Ricardo P\u00f3voa","orcid":"https://orcid.org/0000-0003-2941-7494"},"institutions":[{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]},{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"R. Povoa","raw_affiliation_strings":["Instituto de Telecomunica\u00e7\u00f5es, Instituto Superior Tecnico - Universidade de Lisboa, Lisbon, Portugal"],"affiliations":[{"raw_affiliation_string":"Instituto de Telecomunica\u00e7\u00f5es, Instituto Superior Tecnico - Universidade de Lisboa, Lisbon, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075939956","display_name":"Ant\u00f3nio Canelas","orcid":"https://orcid.org/0000-0002-9414-742X"},"institutions":[{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]},{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"A. Canelas","raw_affiliation_strings":["Instituto de Telecomunica\u00e7\u00f5es, Instituto Superior Tecnico - Universidade de Lisboa, Lisbon, Portugal"],"affiliations":[{"raw_affiliation_string":"Instituto de Telecomunica\u00e7\u00f5es, Instituto Superior Tecnico - Universidade de Lisboa, Lisbon, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056512471","display_name":"Nuno Horta","orcid":"https://orcid.org/0000-0002-1687-1447"},"institutions":[{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]},{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"N. Horta","raw_affiliation_strings":["Instituto de Telecomunica\u00e7\u00f5es, Instituto Superior Tecnico - Universidade de Lisboa, Lisbon, Portugal"],"affiliations":[{"raw_affiliation_string":"Instituto de Telecomunica\u00e7\u00f5es, Instituto Superior Tecnico - Universidade de Lisboa, Lisbon, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5041853563","display_name":"F.V. Fern\u00e1ndez","orcid":"https://orcid.org/0000-0001-8682-2280"},"institutions":[{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]},{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"F.V. Fernandez","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Sevilla, CSIC - Universidad de Sevilla, Seville, Spain"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Sevilla, CSIC - Universidad de Sevilla, Seville, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":9,"corresponding_author_ids":["https://openalex.org/A5040394510"],"corresponding_institution_ids":["https://openalex.org/I79238269"],"apc_list":null,"apc_paid":null,"fwci":0.2575,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.56656295,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10262","display_name":"Microwave Engineering and Waveguides","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/parasitic-extraction","display_name":"Parasitic extraction","score":0.9655333757400513},{"id":"https://openalex.org/keywords/integrated-circuit-layout","display_name":"Integrated circuit layout","score":0.6085593104362488},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5795279741287231},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.5572943091392517},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5544636249542236},{"id":"https://openalex.org/keywords/design-layout-record","display_name":"Design layout record","score":0.5457035303115845},{"id":"https://openalex.org/keywords/inductor","display_name":"Inductor","score":0.5132288932800293},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.47643786668777466},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.4560832679271698},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.455224871635437},{"id":"https://openalex.org/keywords/low-noise-amplifier","display_name":"Low-noise amplifier","score":0.4235367178916931},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.4178183972835541},{"id":"https://openalex.org/keywords/circuit-extraction","display_name":"Circuit extraction","score":0.3636093735694885},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.30877411365509033},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.29462188482284546},{"id":"https://openalex.org/keywords/equivalent-circuit","display_name":"Equivalent circuit","score":0.16301050782203674},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.16114765405654907},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.14542433619499207},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09438413381576538}],"concepts":[{"id":"https://openalex.org/C159818811","wikidata":"https://www.wikidata.org/wiki/Q7135947","display_name":"Parasitic extraction","level":2,"score":0.9655333757400513},{"id":"https://openalex.org/C2765594","wikidata":"https://www.wikidata.org/wiki/Q2624187","display_name":"Integrated circuit layout","level":3,"score":0.6085593104362488},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5795279741287231},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.5572943091392517},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5544636249542236},{"id":"https://openalex.org/C179145894","wikidata":"https://www.wikidata.org/wiki/Q5264353","display_name":"Design layout record","level":5,"score":0.5457035303115845},{"id":"https://openalex.org/C144534570","wikidata":"https://www.wikidata.org/wiki/Q5325","display_name":"Inductor","level":3,"score":0.5132288932800293},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.47643786668777466},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.4560832679271698},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.455224871635437},{"id":"https://openalex.org/C155332784","wikidata":"https://www.wikidata.org/wiki/Q1151304","display_name":"Low-noise amplifier","level":4,"score":0.4235367178916931},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.4178183972835541},{"id":"https://openalex.org/C26490066","wikidata":"https://www.wikidata.org/wiki/Q17006835","display_name":"Circuit extraction","level":4,"score":0.3636093735694885},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.30877411365509033},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.29462188482284546},{"id":"https://openalex.org/C23572009","wikidata":"https://www.wikidata.org/wiki/Q964981","display_name":"Equivalent circuit","level":3,"score":0.16301050782203674},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.16114765405654907},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.14542433619499207},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09438413381576538},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/smacd.2018.8434887","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd.2018.8434887","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1998752433","https://openalex.org/W2116989584","https://openalex.org/W2120627534","https://openalex.org/W2148075699","https://openalex.org/W2293251717","https://openalex.org/W2368587440","https://openalex.org/W2791209703"],"related_works":["https://openalex.org/W2091329789","https://openalex.org/W2376028644","https://openalex.org/W2885948601","https://openalex.org/W2143930978","https://openalex.org/W85694287","https://openalex.org/W4239381562","https://openalex.org/W48176555","https://openalex.org/W4253917875","https://openalex.org/W2110634429","https://openalex.org/W1965232212"],"abstract_inverted_index":{"This":[0],"paper":[1],"exposes":[2],"the":[3,44,49,60,67,90],"problematic":[4,68],"issue":[5],"of":[6,18,94,101],"not":[7],"considering":[8],"device":[9],"variability":[10],"and":[11,92],"layout":[12,51],"parasitic":[13,57],"effects":[14],"in":[15,23,89],"optimization-based":[16],"design":[17,31,91],"radiofrequency":[19],"integrated":[20],"circuits.":[21],"Therefore,":[22],"order":[24],"to":[25],"handle":[26],"these":[27],"issues,":[28],"a":[29,80,95,99],"new":[30],"methodology":[32,86],"that":[33],"performs":[34],"an":[35,55],"all-inclusive":[36],"optimization":[37,61,93],"is":[38],"proposed,":[39],"by":[40,78],"taking":[41],"into":[42,74],"account":[43,75],"process":[45],"variability,":[46],"and,":[47],"performing":[48,54],"complete":[50],"automatically":[52],"while":[53],"accurate":[56],"extraction":[58],"during":[59],"for":[62,106],"each":[63],"candidate":[64],"solution.":[65],"Furthermore,":[66],"inductor":[69],"parasitics":[70],"are":[71],"also":[72],"taken":[73],"with":[76],"EM-accuracy,":[77],"using":[79],"state-of-the-art":[81],"surrogate":[82],"modelling":[83],"technique.":[84],"The":[85],"was":[87],"applied":[88],"low-noise":[96],"amplifier,":[97],"obtaining":[98],"set":[100],"extremely":[102],"robust":[103],"designs":[104],"ready":[105],"fabrication.":[107]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
