{"id":"https://openalex.org/W2887716201","doi":"https://doi.org/10.1109/smacd.2018.8434853","title":"Design and Optimization of a Class-C/D VCO for Ultra-Low-Power IoT and Cellular Applications","display_name":"Design and Optimization of a Class-C/D VCO for Ultra-Low-Power IoT and Cellular Applications","publication_year":2018,"publication_date":"2018-07-01","ids":{"openalex":"https://openalex.org/W2887716201","doi":"https://doi.org/10.1109/smacd.2018.8434853","mag":"2887716201"},"language":"en","primary_location":{"id":"doi:10.1109/smacd.2018.8434853","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd.2018.8434853","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060778711","display_name":"Ricardo Martins","orcid":"https://orcid.org/0000-0002-8251-1415"},"institutions":[{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]},{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]},{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO","PT"],"is_corresponding":true,"raw_author_name":"Ricardo Martins","raw_affiliation_strings":["Instituto de Telecomunicac\u00f5es / Instituto Superior T\u00e9cnico, Universidade de Lisboa, Lisboa, Portugal","State-Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China"],"affiliations":[{"raw_affiliation_string":"Instituto de Telecomunicac\u00f5es / Instituto Superior T\u00e9cnico, Universidade de Lisboa, Lisboa, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]},{"raw_affiliation_string":"State-Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065716990","display_name":"Nuno Louren\u00e7o","orcid":"https://orcid.org/0000-0002-9625-6435"},"institutions":[{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]},{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Nuno Lourenco","raw_affiliation_strings":["Instituto de Telecomunicac\u00f5es / Instituto Superior T\u00e9cnico, Universidade de Lisboa, Lisboa, Portugal"],"affiliations":[{"raw_affiliation_string":"Instituto de Telecomunicac\u00f5es / Instituto Superior T\u00e9cnico, Universidade de Lisboa, Lisboa, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056512471","display_name":"Nuno Horta","orcid":"https://orcid.org/0000-0002-1687-1447"},"institutions":[{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]},{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Nuno Horta","raw_affiliation_strings":["Instituto de Telecomunicac\u00f5es / Instituto Superior T\u00e9cnico, Universidade de Lisboa, Lisboa, Portugal"],"affiliations":[{"raw_affiliation_string":"Instituto de Telecomunicac\u00f5es / Instituto Superior T\u00e9cnico, Universidade de Lisboa, Lisboa, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006541988","display_name":"Jun Yin","orcid":"https://orcid.org/0000-0002-4195-4551"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Jun Yin","raw_affiliation_strings":["State-Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China"],"affiliations":[{"raw_affiliation_string":"State-Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058845450","display_name":"Pui\u2010In Mak","orcid":"https://orcid.org/0000-0002-3579-8740"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Pui-In Mak","raw_affiliation_strings":["State-Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China"],"affiliations":[{"raw_affiliation_string":"State-Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5106943352","display_name":"Rui P. Martins","orcid":"https://orcid.org/0000-0003-2821-648X"},"institutions":[{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]},{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]},{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]}],"countries":["MO","PT"],"is_corresponding":false,"raw_author_name":"Rui P. Martins","raw_affiliation_strings":["Instituto de Telecomunicac\u00f5es / Instituto Superior T\u00e9cnico, Universidade de Lisboa, Lisboa, Portugal","State-Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China"],"affiliations":[{"raw_affiliation_string":"Instituto de Telecomunicac\u00f5es / Instituto Superior T\u00e9cnico, Universidade de Lisboa, Lisboa, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]},{"raw_affiliation_string":"State-Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5060778711"],"corresponding_institution_ids":["https://openalex.org/I141596103","https://openalex.org/I204512498","https://openalex.org/I4210120471"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.07809737,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"129","last_page":"132"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.7707477807998657},{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.6540385484695435},{"id":"https://openalex.org/keywords/transceiver","display_name":"Transceiver","score":0.6354705691337585},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5668619275093079},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.549994945526123},{"id":"https://openalex.org/keywords/dbc","display_name":"dBc","score":0.5141539573669434},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4948102831840515},{"id":"https://openalex.org/keywords/radio-frequency","display_name":"Radio frequency","score":0.4866098165512085},{"id":"https://openalex.org/keywords/figure-of-merit","display_name":"Figure of merit","score":0.4731391966342926},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4072364866733551},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3822263479232788},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.33996307849884033},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.24203446507453918},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.20014619827270508}],"concepts":[{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.7707477807998657},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.6540385484695435},{"id":"https://openalex.org/C7720470","wikidata":"https://www.wikidata.org/wiki/Q954187","display_name":"Transceiver","level":3,"score":0.6354705691337585},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5668619275093079},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.549994945526123},{"id":"https://openalex.org/C193523891","wikidata":"https://www.wikidata.org/wiki/Q1771950","display_name":"dBc","level":3,"score":0.5141539573669434},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4948102831840515},{"id":"https://openalex.org/C74064498","wikidata":"https://www.wikidata.org/wiki/Q3396184","display_name":"Radio frequency","level":2,"score":0.4866098165512085},{"id":"https://openalex.org/C130277099","wikidata":"https://www.wikidata.org/wiki/Q3676605","display_name":"Figure of merit","level":2,"score":0.4731391966342926},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4072364866733551},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3822263479232788},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.33996307849884033},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.24203446507453918},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.20014619827270508},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/smacd.2018.8434853","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd.2018.8434853","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8600000143051147,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1040801819","https://openalex.org/W1998752433","https://openalex.org/W2055978681","https://openalex.org/W2121741926","https://openalex.org/W2124340165","https://openalex.org/W2142408027","https://openalex.org/W2152680645","https://openalex.org/W2156076271","https://openalex.org/W2163108808","https://openalex.org/W2368587440","https://openalex.org/W2412425681"],"related_works":["https://openalex.org/W2141726610","https://openalex.org/W2061664740","https://openalex.org/W2540766993","https://openalex.org/W2086169776","https://openalex.org/W4242529045","https://openalex.org/W2911266525","https://openalex.org/W2017334866","https://openalex.org/W2022376709","https://openalex.org/W1970939492","https://openalex.org/W2081457870"],"abstract_inverted_index":{"The":[0,88],"proper":[1],"analysis":[2,34],"of":[3,6,23,45,59,81,118,122],"design":[4,90,96],"tradeoffs":[5],"Voltage-controlled":[7],"oscillators":[8],"(VCOs)":[9],"embedded":[10],"in":[11],"state-of-the-art":[12],"multistandard":[13],"transceivers":[14],"is":[15],"tedious":[16],"and":[17,91],"impractical,":[18],"as":[19],"a":[20,46,54,74,111],"large":[21],"amount":[22],"conflicting":[24],"performance":[25,43,108],"figures":[26],"obtained":[27],"from":[28],"multiple":[29],"modes,":[30],"test":[31,69],"benches":[32],"and/or":[33],"must":[35],"be":[36],"considered":[37],"simultaneously.":[38],"In":[39],"this":[40,104],"paper,":[41],"the":[42,79,119,123],"boundaries":[44],"complex":[47],"dual-mode":[48,89],"class-C/D":[49],"VCO":[50],"are":[51],"extended":[52],"using":[53],"framework":[55],"for":[56,131],"automatic":[57],"sizing":[58],"radio-frequency":[60],"(RF)":[61],"integrated":[62],"circuit":[63],"(IC)":[64],"blocks,":[65],"where":[66],"an":[67],"all-inclusive":[68],"bench":[70],"formulation":[71],"enhanced":[72],"with":[73,98,134],"measurement":[75],"processing":[76],"system":[77],"enables":[78],"optimization":[80,92],"\u201ceverything-at-once\u201d":[82],"towards":[83],"its":[84,107,129],"true":[85],"optimal":[86],"tradeoffs.":[87],"conducted":[93],"provided":[94],"512":[95],"solutions":[97],"figures-of-merit":[99],"above":[100],"192":[101],"dBc/Hz,":[102],"pushing":[103],"topology":[105],"to":[106],"limits":[109],"on":[110],"65":[112],"nm":[113],"technology,":[114],"by":[115],"reducing":[116],"24%":[117],"power":[120],"consumption":[121],"original":[124],"design,":[125],"while":[126],"also":[127],"showing":[128],"potential":[130],"ultra-low":[132],"power,":[133],"more":[135],"than":[136],"94%":[137],"reduction.":[138]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
