{"id":"https://openalex.org/W2735797852","doi":"https://doi.org/10.1109/smacd.2017.7981597","title":"Advanced integration of variability and degradation in RRAM SPICE compact models","display_name":"Advanced integration of variability and degradation in RRAM SPICE compact models","publication_year":2017,"publication_date":"2017-06-01","ids":{"openalex":"https://openalex.org/W2735797852","doi":"https://doi.org/10.1109/smacd.2017.7981597","mag":"2735797852"},"language":"en","primary_location":{"id":"doi:10.1109/smacd.2017.7981597","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd.2017.7981597","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5058982282","display_name":"Fernando Gar\u0107\u0131a-Redondo","orcid":"https://orcid.org/0000-0001-7090-8821"},"institutions":[{"id":"https://openalex.org/I88060688","display_name":"Universidad Polit\u00e9cnica de Madrid","ror":"https://ror.org/03n6nwv02","country_code":"ES","type":"education","lineage":["https://openalex.org/I88060688"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Fernando Garcia-Redondo","raw_affiliation_strings":["IPT Center, Universidad Polit\u00e9cnica de Madrid, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IPT Center, Universidad Polit\u00e9cnica de Madrid, Spain","institution_ids":["https://openalex.org/I88060688"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045572211","display_name":"Marisa L\u00f3pez\u2010Vallejo","orcid":"https://orcid.org/0000-0002-3833-524X"},"institutions":[{"id":"https://openalex.org/I88060688","display_name":"Universidad Polit\u00e9cnica de Madrid","ror":"https://ror.org/03n6nwv02","country_code":"ES","type":"education","lineage":["https://openalex.org/I88060688"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Marisa Lopez-Vallejo","raw_affiliation_strings":["IPT Center, Universidad Polit\u00e9cnica de Madrid, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IPT Center, Universidad Polit\u00e9cnica de Madrid, Spain","institution_ids":["https://openalex.org/I88060688"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5000478256","display_name":"Carlos Alberto L\u00f3pez Barrio","orcid":"https://orcid.org/0000-0002-2423-5272"},"institutions":[{"id":"https://openalex.org/I88060688","display_name":"Universidad Polit\u00e9cnica de Madrid","ror":"https://ror.org/03n6nwv02","country_code":"ES","type":"education","lineage":["https://openalex.org/I88060688"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Carlos Lopez Barrio","raw_affiliation_strings":["IPT Center, Universidad Polit\u00e9cnica de Madrid, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IPT Center, Universidad Polit\u00e9cnica de Madrid, Spain","institution_ids":["https://openalex.org/I88060688"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I88060688"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"27","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.9491114616394043},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.7725651264190674},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7166779637336731},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.6406461596488953},{"id":"https://openalex.org/keywords/degradation","display_name":"Degradation (telecommunications)","score":0.546261191368103},{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.5033299326896667},{"id":"https://openalex.org/keywords/hardware-emulation","display_name":"Hardware emulation","score":0.4466648995876312},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4014520049095154},{"id":"https://openalex.org/keywords/simulation","display_name":"Simulation","score":0.4009445309638977},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3780980110168457},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.33123189210891724},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.24236178398132324},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.15529361367225647},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1536191999912262},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.14813801646232605}],"concepts":[{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.9491114616394043},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.7725651264190674},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7166779637336731},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.6406461596488953},{"id":"https://openalex.org/C2779679103","wikidata":"https://www.wikidata.org/wiki/Q5251805","display_name":"Degradation (telecommunications)","level":2,"score":0.546261191368103},{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.5033299326896667},{"id":"https://openalex.org/C94115699","wikidata":"https://www.wikidata.org/wiki/Q5656406","display_name":"Hardware emulation","level":3,"score":0.4466648995876312},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4014520049095154},{"id":"https://openalex.org/C44154836","wikidata":"https://www.wikidata.org/wiki/Q45045","display_name":"Simulation","level":1,"score":0.4009445309638977},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3780980110168457},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.33123189210891724},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.24236178398132324},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.15529361367225647},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1536191999912262},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.14813801646232605},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/smacd.2017.7981597","is_oa":false,"landing_page_url":"https://doi.org/10.1109/smacd.2017.7981597","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5799999833106995,"id":"https://metadata.un.org/sdg/15","display_name":"Life in Land"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1486058693","https://openalex.org/W1512867548","https://openalex.org/W1586075670","https://openalex.org/W1662522325","https://openalex.org/W1795116911","https://openalex.org/W2083980649","https://openalex.org/W2305472256","https://openalex.org/W2313645715","https://openalex.org/W2329040051","https://openalex.org/W2345112379","https://openalex.org/W2468082729","https://openalex.org/W3100202380","https://openalex.org/W4236126228","https://openalex.org/W7058353394"],"related_works":["https://openalex.org/W2015297467","https://openalex.org/W2105831835","https://openalex.org/W2035017065","https://openalex.org/W2094066961","https://openalex.org/W2285231005","https://openalex.org/W2323645878","https://openalex.org/W3195722497","https://openalex.org/W3049246456","https://openalex.org/W4241208885","https://openalex.org/W1980413812"],"abstract_inverted_index":{"Variability":[0],"and":[1,16,23,59,128],"degradation":[2,60],"in":[3,31,62],"RRAM":[4],"devices":[5],"involve":[6],"complex":[7,57],"physical":[8,115],"mechanisms":[9],"that":[10,118],"depend":[11],"on":[12,122],"the":[13,36,54,78,94,103,106,123,133,144],"device,":[14],"environment":[15],"programming/read":[17],"operation.":[18],"The":[19],"development":[20],"of":[21,39,42,56,87,96,105,113,143],"solid":[22],"accurate":[24],"compact":[25],"models,":[26],"ready":[27],"to":[28,84,93],"be":[29,82],"used":[30],"standard":[32],"circuit":[33],"simulators,":[34],"requires":[35],"meticulous":[37],"emulation":[38,55,95],"this":[40,46],"kind":[41,86],"non-ideal":[43,146],"effects.":[44],"In":[45],"work":[47],"we":[48,110,136],"present":[49],"an":[50,138],"advanced":[51],"approach":[52],"for":[53],"variability":[58],"effects":[61],"SPICE":[63,116],"compacts":[64],"models.":[65],"Without":[66],"requiring":[67],"compiled":[68],"components":[69],"-":[70,77],"such":[71],"as":[72],"Verilog-A":[73],"or":[74],"CMI":[75],"code":[76],"proposed":[79,134],"solution":[80],"can":[81],"adapted":[83],"any":[85],"memristor":[88],"model":[89,117,140],"providing":[90],"full":[91],"support":[92],"these":[97],"intricate":[98],"behaviors.":[99],"Thorough":[100],"experiments":[101],"illustrate":[102],"capabilities":[104],"presented":[107],"approach.":[108],"There,":[109],"make":[111],"use":[112],"a":[114],"emulates":[119],"behavioral":[120],"dependence":[121],"device":[124],"cycling,":[125],"simulation":[126],"time":[127],"stress":[129],"levels.":[130],"After":[131],"applying":[132],"techniques,":[135],"obtain":[137],"enhanced":[139],"properly":[141],"aware":[142],"device's":[145],"behavior.":[147]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}